[AMD Official Use Only - AMD Internal Distribution Only]
Hi Christian,
It fixes a potential Overflowed constant (INTEGER_OVERFLOW) warning reported by Coverity.
Regards,
Bob
-----Original Message-----
From: Koenig, Christian <Christian.Koenig@xxxxxxx>
Sent: 2024年6月3日 15:56
To: Zhou, Bob <Bob.Zhou@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Huang, Tim <Tim.Huang@xxxxxxx>; Zhang, Jesse(Jie) <Jesse.Zhang@xxxxxxx>
Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>
Subject: Re: [PATCH] drm/amdgpu: replace int with unsigned int for imu_v12_0.c
Am 03.06.24 um 07:59 schrieb Bob Zhou:
> The return value of RREG32_SOC15 is unsigned int, so modify variable to unsigned.
And why is that an improvement?
Regards,
Christian.
>
> Signed-off-by: Bob Zhou <bob.zhou@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/imu_v12_0.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
> b/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
> index 0c8ef908d112..2d6f7549c2af 100644
> --- a/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/imu_v12_0.c
> @@ -119,7 +119,7 @@ static int imu_v12_0_load_microcode(struct
> amdgpu_device *adev)
>
> static int imu_v12_0_wait_for_reset_status(struct amdgpu_device *adev)
> {
> - int i, imu_reg_val = 0;
> + unsigned int i, imu_reg_val = 0;
>
> for (i = 0; i < adev->usec_timeout; i++) {
> imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_GFX_RESET_CTRL); @@
> -138,7 +138,7 @@ static int imu_v12_0_wait_for_reset_status(struct
> amdgpu_device *adev)
>
> static void imu_v12_0_setup(struct amdgpu_device *adev)
> {
> - int imu_reg_val;
> + unsigned int imu_reg_val;
>
> WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_ACCESS_CTRL0, 0xffffff);
> WREG32_SOC15(GC, 0, regGFX_IMU_C2PMSG_ACCESS_CTRL1, 0xffff); @@
> -157,7 +157,7 @@ static void imu_v12_0_setup(struct amdgpu_device
> *adev)
>
> static int imu_v12_0_start(struct amdgpu_device *adev)
> {
> - int imu_reg_val;
> + unsigned int imu_reg_val;
>
> imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_CORE_CTRL);
> imu_reg_val &= 0xfffffffe;
