From: Wenjing Liu <wenjing.liu@xxxxxxx> [why] A recent change for ODM combine refactor contains a typo which causes ODM combine mode programmed incorrectly. Reviewed-by: George Shen <george.shen@xxxxxxx> Acked-by: Roman Li <roman.li@xxxxxxx> Signed-off-by: Wenjing Liu <wenjing.liu@xxxxxxx> --- drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c index d085c9ff9d38..42c3c440ed89 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c @@ -854,7 +854,7 @@ enum dc_status dcn20_enable_stream_timing( opp_cnt = resource_get_opp_heads_for_otg_master(pipe_ctx, &context->res_ctx, opp_heads); for (i = 0; i < opp_cnt; i++) - opp_inst[opp_cnt] = opp_heads[i]->stream_res.opp->inst; + opp_inst[i] = opp_heads[i]->stream_res.opp->inst; odm_slice_width = resource_get_odm_slice_dst_width(pipe_ctx, false); last_odm_slice_width = resource_get_odm_slice_dst_width(pipe_ctx, true); -- 2.34.1
