Re: [PATCH v3 1/4] drm/amdgpu: update the ip_dump to ipdump_core

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On 5/16/2024 1:37 AM, Deucher, Alexander wrote:
[Public]

-----Original Message-----
From: Sunil Khatri <sunil.khatri@xxxxxxx>
Sent: Wednesday, May 15, 2024 8:18 AM
To: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Koenig, Christian
<Christian.Koenig@xxxxxxx>
Cc: amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Khatri, Sunil <Sunil.Khatri@xxxxxxx>
Subject: [PATCH v3 1/4] drm/amdgpu: update the ip_dump to ipdump_core

Update the memory pointer from ip_dump to ipdump_core to make it specific
to core registers and rest other registers to be dumped in their respective
memories.

Signed-off-by: Sunil Khatri <sunil.khatri@xxxxxxx>
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h |  2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c  | 14 +++++++-------
  2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index 109f471ff315..30d7f9c29478 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -435,7 +435,7 @@ struct amdgpu_gfx {
       bool                            mcbp; /* mid command buffer
preemption */

       /* IP reg dump */
-     uint32_t                        *ip_dump;
+     uint32_t                        *ipdump_core;
I think this looks cleaner as ip_dump_core.

Noted



Alex

  };

  struct amdgpu_gfx_ras_reg_entry {
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 953df202953a..f6d6a4b9802d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -4603,9 +4603,9 @@ static void gfx_v10_0_alloc_dump_mem(struct
amdgpu_device *adev)
       ptr = kcalloc(reg_count, sizeof(uint32_t), GFP_KERNEL);
       if (ptr == NULL) {
               DRM_ERROR("Failed to allocate memory for IP Dump\n");
-             adev->gfx.ip_dump = NULL;
+             adev->gfx.ipdump_core = NULL;
       } else {
-             adev->gfx.ip_dump = ptr;
+             adev->gfx.ipdump_core = ptr;
       }
  }

@@ -4815,7 +4815,7 @@ static int gfx_v10_0_sw_fini(void *handle)

       gfx_v10_0_free_microcode(adev);

-     kfree(adev->gfx.ip_dump);
+     kfree(adev->gfx.ipdump_core);

       return 0;
  }
@@ -9283,13 +9283,13 @@ static void gfx_v10_ip_print(void *handle, struct
drm_printer *p)
       uint32_t i;
       uint32_t reg_count = ARRAY_SIZE(gc_reg_list_10_1);

-     if (!adev->gfx.ip_dump)
+     if (!adev->gfx.ipdump_core)
               return;

       for (i = 0; i < reg_count; i++)
               drm_printf(p, "%-50s \t 0x%08x\n",
                          gc_reg_list_10_1[i].reg_name,
-                        adev->gfx.ip_dump[i]);
+                        adev->gfx.ipdump_core[i]);
  }

  static void gfx_v10_ip_dump(void *handle) @@ -9298,12 +9298,12 @@
static void gfx_v10_ip_dump(void *handle)
       uint32_t i;
       uint32_t reg_count = ARRAY_SIZE(gc_reg_list_10_1);

-     if (!adev->gfx.ip_dump)
+     if (!adev->gfx.ipdump_core)
               return;

       amdgpu_gfx_off_ctrl(adev, false);
       for (i = 0; i < reg_count; i++)
-             adev->gfx.ip_dump[i] =
RREG32(SOC15_REG_ENTRY_OFFSET(gc_reg_list_10_1[i]));
+             adev->gfx.ipdump_core[i] =
+RREG32(SOC15_REG_ENTRY_OFFSET(gc_reg_list_10_1[i]));
       amdgpu_gfx_off_ctrl(adev, true);
  }

--
2.34.1



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