[AMD Official Use Only - General]
Hi Jesse,
> -----Original Message-----
> From: Zhang, Jesse(Jie) <Jesse.Zhang@xxxxxxx>
> Sent: Monday, May 6, 2024 2:21 PM
> To: Zhang, Jesse(Jie) <Jesse.Zhang@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Koenig, Christian
> <Christian.Koenig@xxxxxxx>; Huang, Tim <Tim.Huang@xxxxxxx>
> Subject: RE: [PATCH] drm/amd/pm: fix the uninitialized scalar variable warning
>
> [AMD Official Use Only - General]
>
> Ping ...
>
> -----Original Message-----
> From: Jesse Zhang <jesse.zhang@xxxxxxx>
> Sent: Tuesday, April 30, 2024 3:14 PM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Koenig, Christian
> <Christian.Koenig@xxxxxxx>; Huang, Tim <Tim.Huang@xxxxxxx>; Zhang,
> Jesse(Jie) <Jesse.Zhang@xxxxxxx>; Zhang, Jesse(Jie) <Jesse.Zhang@xxxxxxx>
> Subject: [PATCH] drm/amd/pm: fix the uninitialized scalar variable warning
>
> Fix warning for using uninitialized values sclk_mask, mclk_mask and soc_mask.
> v2:Set default variable to UMD PSTATE(Tim Huang)
>
> Signed-off-by: Jesse Zhang <Jesse.Zhang@xxxxxxx>
> ---
> .../gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 32 ++++++++++++++++---
> 1 file changed, 27 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> index 8908bbb3ff1f..36a49cfc22e4 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
> @@ -835,10 +835,20 @@ static int renoir_force_clk_levels(struct smu_context
> *smu,
> ret = renoir_get_dpm_clk_limited(smu, clk_type, soft_max_level,
> &max_freq);
> if (ret)
> return ret;
> - ret = smu_cmn_send_smc_msg_with_param(smu,
> SMU_MSG_SetSoftMaxSocclkByFreq, max_freq, NULL);
> + /* = 0: min_freq
> + * = 1: UMD_PSTATE_CLK
> + * >= 2: max_freq
> + */
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> SMU_MSG_SetSoftMaxSocclkByFreq,
> + soft_max_level == 0 ? min_freq :
> + soft_max_level == 1 ?
> RENOIR_UMD_PSTATE_SOCCLK : max_freq,
> + NULL);
> if (ret)
> return ret;
> - ret = smu_cmn_send_smc_msg_with_param(smu,
> SMU_MSG_SetHardMinSocclkByFreq, min_freq, NULL);
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> SMU_MSG_SetHardMinSocclkByFreq,
> + soft_min_level == 0 ? min_freq :
> + soft_min_level == 1 ?
> RENOIR_UMD_PSTATE_SOCCLK : max_freq,
> + NULL);
> if (ret)
> return ret;
> break;
> @@ -850,10 +860,21 @@ static int renoir_force_clk_levels(struct smu_context
> *smu,
> ret = renoir_get_dpm_clk_limited(smu, clk_type, soft_max_level,
> &max_freq);
> if (ret)
> return ret;
> - ret = smu_cmn_send_smc_msg_with_param(smu,
> SMU_MSG_SetSoftMaxFclkByFreq, max_freq, NULL);
> + /* mclk levels are in reverse order
> + * = 0: max_freq
> + * = 1: UMD_PSTATE_CLK
> + * >= 2: min_freq
> + */
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> SMU_MSG_SetSoftMaxFclkByFreq,
> + soft_max_level >= 2 ? min_freq :
> + soft_max_level == 1 ?
> RENOIR_UMD_PSTATE_FCLK : max_freq,
> + NULL);
> if (ret)
> return ret;
> - ret = smu_cmn_send_smc_msg_with_param(smu,
> SMU_MSG_SetHardMinFclkByFreq, min_freq, NULL);
> + ret = smu_cmn_send_smc_msg_with_param(smu,
> SMU_MSG_SetHardMinFclkByFreq,
> + soft_min_level >= 2 ? min_freq :
> + soft_min_level == 1 ?
> RENOIR_UMD_PSTATE_SOCCLK : max_freq,
> + NULL);
It's not the fault of your patch. The original implementation may not set the correct min frequency for MCLK when set to the performance level PROFILE_MIN_MCLK,
For the case, we should make the min_freq = max_freq = clk_table->FClocks[NUM_FCLK_DPM_LEVELS-1].Freq.
Tim
> if (ret)
> return ret;
> break;
> @@ -932,7 +953,8 @@ static int renoir_set_performance_level(struct
> smu_context *smu,
> enum amd_dpm_forced_level level) {
> int ret = 0;
> - uint32_t sclk_mask, mclk_mask, soc_mask;
> + /* default mask is UMD PSTATE CLK */
> + uint32_t sclk_mask = 1, mclk_mask = 1, soc_mask = 1;
>
> switch (level) {
> case AMD_DPM_FORCED_LEVEL_HIGH:
> --
> 2.25.1
>
