Re: [PATCH v9 06/14] drm/amdgpu: create context space for usermode queue

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On 01/05/2024 23:11, Alex Deucher wrote:
On Fri, Apr 26, 2024 at 10:07 AM Shashank Sharma
<shashank.sharma@xxxxxxx> wrote:
The FW expects us to allocate at least one page as context
space to process gang, process, GDS and FW  related work.
This patch creates a joint object for the same, and calculates
GPU space offsets of these spaces.

V1: Addressed review comments on RFC patch:
     Alex: Make this function IP specific

V2: Addressed review comments from Christian
     - Allocate only one object for total FW space, and calculate
       offsets for each of these objects.

V3: Integration with doorbell manager

V4: Review comments:
     - Remove shadow from FW space list from cover letter (Alex)
     - Alignment of macro (Luben)

V5: Merged patches 5 and 6 into this single patch
     Addressed review comments:
     - Use lower_32_bits instead of mask (Christian)
     - gfx_v11_0 instead of gfx_v11 in function names (Alex)
     - Shadow and GDS objects are now coming from userspace (Christian,
       Alex)

V6:
     - Add a comment to replace amdgpu_bo_create_kernel() with
       amdgpu_bo_create() during fw_ctx object creation (Christian).
     - Move proc_ctx_gpu_addr, gang_ctx_gpu_addr and fw_ctx_gpu_addr out
       of generic queue structure and make it gen11 specific (Alex).

V7:
    - Using helper function to create/destroy userqueue objects.
    - Removed FW object space allocation.

V8:
    - Updating FW object address from user values.

V9:
    - uppdated function name from gfx_v11_* to mes_v11_*

Cc: Alex Deucher <alexander.deucher@xxxxxxx>
Cc: Christian Koenig <christian.koenig@xxxxxxx>
Signed-off-by: Shashank Sharma <shashank.sharma@xxxxxxx>
Signed-off-by: Arvind Yadav <arvind.yadav@xxxxxxx>
---
  .../gpu/drm/amd/amdgpu/mes_v11_0_userqueue.c  | 43 +++++++++++++++++++
  .../gpu/drm/amd/include/amdgpu_userqueue.h    |  1 +
  2 files changed, 44 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0_userqueue.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0_userqueue.c
index 9e7dee77d344..9f9fdcb9c294 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0_userqueue.c
@@ -27,6 +27,41 @@
  #include "mes_v11_0.h"
  #include "amdgpu_userqueue.h"

+#define AMDGPU_USERQ_PROC_CTX_SZ PAGE_SIZE
+#define AMDGPU_USERQ_GANG_CTX_SZ PAGE_SIZE
+
+static int mes_v11_0_userq_create_ctx_space(struct amdgpu_userq_mgr *uq_mgr,
+                                           struct amdgpu_usermode_queue *queue,
+                                           struct drm_amdgpu_userq_mqd *mqd_user)
+{
+       struct amdgpu_userq_obj *ctx = &queue->fw_obj;
+       struct v11_gfx_mqd *mqd = queue->mqd.cpu_ptr;
+       int r, size;
+
+       /*
+        * The FW expects at least one page space allocated for
+        * process ctx and gang ctx each. Create an object
+        * for the same.
+        */
+       size = AMDGPU_USERQ_PROC_CTX_SZ + AMDGPU_USERQ_GANG_CTX_SZ;
+       r = amdgpu_userqueue_create_object(uq_mgr, ctx, size);
Is this per queue or per context?  I.e., is this shared with all
queues associated with an fd?

This is per queue object, required for MES mapping of a queue.

- Shashank

Alex

+       if (r) {
+               DRM_ERROR("Failed to allocate ctx space bo for userqueue, err:%d\n", r);
+               return r;
+       }
+
+       /* Shadow and GDS objects come directly from userspace */
+       mqd->shadow_base_lo = mqd_user->shadow_va & 0xFFFFFFFC;
+       mqd->shadow_base_hi = upper_32_bits(mqd_user->shadow_va);
+
+       mqd->gds_bkup_base_lo = mqd_user->gds_va & 0xFFFFFFFC;
+       mqd->gds_bkup_base_hi = upper_32_bits(mqd_user->gds_va);
+
+       mqd->fw_work_area_base_lo = mqd_user->csa_va & 0xFFFFFFFC;
+       mqd->fw_work_area_base_hi = upper_32_bits(mqd_user->csa_va);
+       return 0;
+}
+
  static int mes_v11_0_userq_mqd_create(struct amdgpu_userq_mgr *uq_mgr,
                                       struct drm_amdgpu_userq_in *args_in,
                                       struct amdgpu_usermode_queue *queue)
@@ -82,6 +117,13 @@ static int mes_v11_0_userq_mqd_create(struct amdgpu_userq_mgr *uq_mgr,
                 goto free_mqd;
         }

+       /* Create BO for FW operations */
+       r = mes_v11_0_userq_create_ctx_space(uq_mgr, queue, mqd_user);
+       if (r) {
+               DRM_ERROR("Failed to allocate BO for userqueue (%d)", r);
+               goto free_mqd;
+       }
+
         return 0;

  free_mqd:
@@ -100,6 +142,7 @@ static void
  mes_v11_0_userq_mqd_destroy(struct amdgpu_userq_mgr *uq_mgr,
                             struct amdgpu_usermode_queue *queue)
  {
+       amdgpu_userqueue_destroy_object(uq_mgr, &queue->fw_obj);
         kfree(queue->userq_prop);
         amdgpu_userqueue_destroy_object(uq_mgr, &queue->mqd);
  }
diff --git a/drivers/gpu/drm/amd/include/amdgpu_userqueue.h b/drivers/gpu/drm/amd/include/amdgpu_userqueue.h
index bbd29f68b8d4..643f31474bd8 100644
--- a/drivers/gpu/drm/amd/include/amdgpu_userqueue.h
+++ b/drivers/gpu/drm/amd/include/amdgpu_userqueue.h
@@ -44,6 +44,7 @@ struct amdgpu_usermode_queue {
         struct amdgpu_userq_mgr *userq_mgr;
         struct amdgpu_vm        *vm;
         struct amdgpu_userq_obj mqd;
+       struct amdgpu_userq_obj fw_obj;
  };

  struct amdgpu_userq_funcs {
--
2.43.2




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