[AMD Official Use Only - General]
Reviewed-by: Yifan Zhang <yifan1.zhang@xxxxxxx>
Best Regards,
Yifan
-----Original Message-----
From: Xiao, Jack <Jack.Xiao@xxxxxxx>
Sent: Monday, April 29, 2024 5:10 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Zhang, Hawking <Hawking.Zhang@xxxxxxx>; Gao, Likun <Likun.Gao@xxxxxxx>; Zhang, Yifan <Yifan1.Zhang@xxxxxxx>; Huang, Tim <Tim.Huang@xxxxxxx>
Cc: Xiao, Jack <Jack.Xiao@xxxxxxx>
Subject: [PATCH] drm/amdgpu/mes11: increase waiting time for engine ready
mes schq engine require more waiting time for engine ready before packet submission.
Signed-off-by: Jack Xiao <Jack.Xiao@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index 28a04f0f3541..d98f6d282ae7 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
@@ -696,7 +696,7 @@ static void mes_v11_0_enable(struct amdgpu_device *adev, bool enable)
if (amdgpu_emu_mode)
msleep(100);
else
- udelay(50);
+ udelay(500);
} else {
data = RREG32_SOC15(GC, 0, regCP_MES_CNTL);
data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE0_ACTIVE, 0);
--
2.41.0
