[AMD Official Use Only - General]
Hmm... we do expect PSP report the XGMI/WAFL Caps. This is different from legacy RAS CAP check through atomfirmware. But if you found the XGMI/WAFL bits are not set properly in the new PSP interface, let's reach out to PSP firmware team for a fix.
Regards,
Hawking
-----Original Message-----
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Stanley.Yang
Sent: Thursday, April 25, 2024 15:08
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Yang, Stanley <Stanley.Yang@xxxxxxx>
Subject: [PATCH Review 1/1] drm/amdgpu: Adjust XGMI WAFL ras enable bit
The way to get ras capability has changed for some asics, both of them need check XGMI physical nodes number to set XGMI WAFL ras enable bit.
Signed-off-by: Stanley.Yang <Stanley.Yang@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index b2a883d3e19d..ea77e00cc002 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -2918,13 +2918,6 @@ static void amdgpu_ras_query_ras_capablity_from_vbios(struct amdgpu_device *adev
else
adev->ras_hw_enabled &= ~(1 << AMDGPU_RAS_BLOCK__VCN |
1 << AMDGPU_RAS_BLOCK__JPEG);
-
- /*
- * XGMI RAS is not supported if xgmi num physical nodes
- * is zero
- */
- if (!adev->gmc.xgmi.num_physical_nodes)
- adev->ras_hw_enabled &= ~(1 << AMDGPU_RAS_BLOCK__XGMI_WAFL);
} else {
dev_info(adev->dev, "SRAM ECC is not presented.\n");
}
@@ -3002,6 +2995,13 @@ static void amdgpu_ras_check_supported(struct amdgpu_device *adev)
amdgpu_ras_query_poison_mode(adev);
init_ras_enabled_flag:
+ /*
+ * XGMI RAS is not supported if xgmi num physical nodes
+ * is zero
+ */
+ if (!adev->gmc.xgmi.num_physical_nodes)
+ adev->ras_hw_enabled &= ~(1 << AMDGPU_RAS_BLOCK__XGMI_WAFL);
+
/* hw_supported needs to be aligned with RAS block mask. */
adev->ras_hw_enabled &= AMDGPU_RAS_BLOCK_MASK;
--
2.25.1
