[Public] Reviewed-by: Lang Yu <lang.yu@xxxxxxx> >-----Original Message----- >From: Lee, Peyton <Peyton.Lee@xxxxxxx> >Sent: Thursday, April 18, 2024 1:13 PM >To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx >Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Liu, HaoPing (Alan) ><HaoPing.Liu@xxxxxxx>; Yu, Lang <Lang.Yu@xxxxxxx>; Lee, Peyton ><Peyton.Lee@xxxxxxx> >Subject: [PATCH] drm/amdgpu/vpe: fix vpe dpm setup failed > >The vpe dpm settings should be done before firmware is loaded. >Otherwise, the frequency cannot be successfully raised. > >Signed-off-by: Peyton Lee <peytolee@xxxxxxx> >--- > drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c | 2 +- > drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c | 14 +++++++------- > 2 files changed, 8 insertions(+), 8 deletions(-) > >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c >b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c >index 6695481f870f..c23d97d34b7e 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c >@@ -205,7 +205,7 @@ int amdgpu_vpe_configure_dpm(struct amdgpu_vpe >*vpe) > dpm_ctl &= 0xfffffffe; /* Disable DPM */ > WREG32(vpe_get_reg_offset(vpe, 0, vpe->regs.dpm_enable), >dpm_ctl); > dev_dbg(adev->dev, "%s: disable vpe dpm\n", __func__); >- return 0; >+ return -EINVAL; > } > > int amdgpu_vpe_psp_update_sram(struct amdgpu_device *adev) diff --git >a/drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c >b/drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c >index 769eb8f7bb3c..09315dd5a1ec 100644 >--- a/drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c >+++ b/drivers/gpu/drm/amd/amdgpu/vpe_v6_1.c >@@ -144,6 +144,12 @@ static int vpe_v6_1_load_microcode(struct >amdgpu_vpe *vpe) > WREG32(vpe_get_reg_offset(vpe, j, regVPEC_CNTL), >ret); > } > >+ /* setup collaborate mode */ >+ vpe_v6_1_set_collaborate_mode(vpe, true); >+ /* setup DPM */ >+ if (amdgpu_vpe_configure_dpm(vpe)) >+ dev_warn(adev->dev, "VPE failed to enable DPM\n"); >+ > /* > * For VPE 6.1.1, still only need to add master's offset, and psp will >apply it to slave as well. > * Here use instance 0 as master. >@@ -159,11 +165,7 @@ static int vpe_v6_1_load_microcode(struct >amdgpu_vpe *vpe) > adev->vpe.cmdbuf_cpu_addr[0] = f32_offset; > adev->vpe.cmdbuf_cpu_addr[1] = f32_cntl; > >- amdgpu_vpe_psp_update_sram(adev); >- vpe_v6_1_set_collaborate_mode(vpe, true); >- amdgpu_vpe_configure_dpm(vpe); >- >- return 0; >+ return amdgpu_vpe_psp_update_sram(adev); > } > > vpe_hdr = (const struct vpe_firmware_header_v1_0 *)adev->vpe.fw- >>data; @@ -196,8 +198,6 @@ static int vpe_v6_1_load_microcode(struct >amdgpu_vpe *vpe) > } > > vpe_v6_1_halt(vpe, false); >- vpe_v6_1_set_collaborate_mode(vpe, true); >- amdgpu_vpe_configure_dpm(vpe); > > return 0; > } >-- >2.34.1
