On Wed, Apr 17, 2024 at 8:07 AM Lijo Lazar <lijo.lazar@xxxxxxx> wrote: > > HDP Flush request bit can be kept unique per AID, and doesn't need to be > unique SOC-wide. Assign only bits 10-13 for SDMA v4.4.2. > > Signed-off-by: Lijo Lazar <lijo.lazar@xxxxxxx> Acked-by: Alex Deucher <alexander.deucher@xxxxxxx> > --- > drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c > index f8e2cd514493..09e45ef16c0d 100644 > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c > @@ -368,7 +368,8 @@ static void sdma_v4_4_2_ring_emit_hdp_flush(struct amdgpu_ring *ring) > u32 ref_and_mask = 0; > const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio.hdp_flush_reg; > > - ref_and_mask = nbio_hf_reg->ref_and_mask_sdma0 << ring->me; > + ref_and_mask = nbio_hf_reg->ref_and_mask_sdma0 > + << (ring->me % adev->sdma.num_inst_per_aid); > > sdma_v4_4_2_wait_reg_mem(ring, 0, 1, > adev->nbio.funcs->get_hdp_flush_done_offset(adev), > -- > 2.25.1 >
