Hey Alex, Christian, On a slightly unrelated note. Have you also considered using system_highpri_wq instead of system_wq for the delayed interrupt work? There is a potential for multi-ms latency for systems under high CPU load. And that is usually the case when users are running games. Regards, Andres On Wed, Mar 15, 2017 at 4:18 PM, Alex Deucher <alexdeucher at gmail.com> wrote: > From: "Roger.He" <Hongbo.He at amd.com> > > We originally limited the IH to 4k on tonga since it > uses bus addresses directly rather than GPU MC addresses, > so it needs contigous physical memory. This brings it > inline with other asics. > > Signed-off-by: Roger.He <Hongbo.He at amd.com> > Acked-by: Alex Deucher <alexander.deucher at amd.com> > Signed-off-by: Alex Deucher <alexander.deucher at amd.com> > --- > drivers/gpu/drm/amd/amdgpu/tonga_ih.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c > index 2053220..3a5097a 100644 > --- a/drivers/gpu/drm/amd/amdgpu/tonga_ih.c > +++ b/drivers/gpu/drm/amd/amdgpu/tonga_ih.c > @@ -289,7 +289,7 @@ static int tonga_ih_sw_init(void *handle) > int r; > struct amdgpu_device *adev = (struct amdgpu_device *)handle; > > - r = amdgpu_ih_ring_init(adev, 4 * 1024, true); > + r = amdgpu_ih_ring_init(adev, 64 * 1024, true); > if (r) > return r; > > -- > 2.5.5 > > _______________________________________________ > amd-gfx mailing list > amd-gfx at lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
