[Public]
Hi all,
This week this patchset was tested on the following systems:
* Lenovo ThinkBook T13s Gen4 with AMD Ryzen 5 6600U
* MSI Gaming X Trio RX 6800
* Gigabyte Gaming OC RX 7900 XTX
These systems were tested on the following display/connection types:
* eDP, (1080p 60hz [5650U]) (1920x1200 60hz [6600U]) (2560x1600 120hz[6600U])
* VGA and DVI (1680x1050 60hz [DP to VGA/DVI, USB-C to VGA/DVI])
* DP/HDMI/USB-C (1440p 170hz, 4k 60hz, 4k 144hz, 4k 240hz [Includes USB-C to DP/HDMI adapters])
* Thunderbolt (LG Ultrafine 5k)
* MST (Startech MST14DP123DP [DP to 3x DP] and 2x 4k 60Hz displays)
* DSC (with Cable Matters 101075 [DP to 3x DP] with 3x 4k60 displays, and HP Hook G2 with 1 4k60 display)
* USB 4 (Kensington SD5700T and 1x 4k 60Hz display)
* PCON (Club3D CAC-1085 and 1x 4k 144Hz display [at 4k 120HZ, as that is the max the adapter supports])
The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to):
* Changing display configurations and settings
* Benchmark testing
* Feature testing (Freesync, etc.)
Automated testing includes (but is not limited to):
* Script testing (scripts to automate some of the manual checks)
* IGT testing
The patchset consists of the amd-staging-drm-next branch (Head commit - 8294fd749e0d drm/amd/display: Get min/max vfreq from display_info) with new patches added on top of it.
Tested on Ubuntu 22.04.3, on Wayland and X11, using KDE Plasma and Gnome.
Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Thank you,
Dan Wheeler
Sr. Technologist | AMD
SW Display
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1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com
-----Original Message-----
From: Tom Chung <chiahsuan.chung@xxxxxxx>
Sent: Wednesday, March 20, 2024 2:36 AM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Wentland, Harry <Harry.Wentland@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx>; Lin, Wayne <Wayne.Lin@xxxxxxx>; Gutierrez, Agustin <Agustin.Gutierrez@xxxxxxx>; Chung, ChiaHsuan (Tom) <ChiaHsuan.Chung@xxxxxxx>; Wu, Hersen <hersenxs.wu@xxxxxxx>; Zuo, Jerry <Jerry.Zuo@xxxxxxx>; Wheeler, Daniel <Daniel.Wheeler@xxxxxxx>
Subject: [PATCH 00/22] DC Patches Mar 25 2024
This DC patchset brings improvements in multiple areas. In summary, we have:
- Fix some bound and NULL check
- Fix nonseamless transition from ODM + MPO to ODM + subvp
- Allow Z8 when stutter threshold is not met
- Remove plane and stream pointers from dc scratch
- Remove read/write to external register
- Increase number of hpo dp link encoders
- Increase clock table size
- Add new IPS config mode
- Build scaling params when a new plane is appended
- Refactor DML2 interfaces
- Allow idle opts for no flip case on PSR panel
Cc: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Alvin Lee (2):
drm/amd/display: Allow idle opts for no flip case on PSR panel
drm/amd/display: Remove plane and stream pointers from dc scratch
Anthony Koo (1):
drm/amd/display: [FW Promotion] Release 0.0.210.0
Aric Cyr (1):
drm/amd/display: 3.2.278
Bhawanpreet Lakha (2):
drm/amd/display: Allow Z8 when stutter threshold is not met
drm/amd/display: Allow Z8 when stutter threshold is not met for dcn35
Dillon Varone (3):
drm/amd/display: Expand DML2 callbacks
drm/amd/display: Refactor DML2 interfaces
drm/amd/display: Modify DHCUB waterwark structures and functions
George Shen (1):
drm/amd/display: Remove MPC rate control logic from DCN30 and above
Muhammad Ahmed (1):
drm/amd/display: Skip pipe if the pipe idx not set properly
Natanel Roizenman (1):
drm/amd/display: Consolidate HPO enable/disable and restrict only to
state transitions.
Nicholas Kazlauskas (1):
drm/amd/display: Add new IPS config mode
Roman Li (1):
drm/amd/display: Fix bounds check for dcn35 DcfClocks
Sohaib Nadeem (1):
drm/amd/display: Added missing null checks
Sridevi Arvindekar (1):
drm/amd/display: Increase number of hpo dp link encoders
Sung Joon Kim (2):
drm/amd/display: Remove read/write to external register
drm/amd/display: Increase clock table size
Taimur Hassan (1):
drm/amd/display: Send DTBCLK disable message on first commit
Wenjing Liu (3):
drm/amd/display: fix a dereference of a NULL pointer
drm/amd/display: fix nonseamless transition from ODM + MPO to ODM +
subvp
drm/amd/display: build scaling params when a new plane is appended
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 18 +--
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 42 +++---
.../display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 45 +------ .../amd/display/dc/clk_mgr/dcn35/dcn35_smu.c | 21 ---
.../amd/display/dc/clk_mgr/dcn35/dcn35_smu.h | 2 -
drivers/gpu/drm/amd/display/dc/core/dc.c | 86 ++++++------
.../drm/amd/display/dc/core/dc_hw_sequencer.c | 8 +-
.../gpu/drm/amd/display/dc/core/dc_resource.c | 89 ++++++++++++-
.../gpu/drm/amd/display/dc/core/dc_state.c | 31 +++--
.../gpu/drm/amd/display/dc/core/dc_stream.c | 16 +--
.../gpu/drm/amd/display/dc/core/dc_surface.c | 49 ++-----
drivers/gpu/drm/amd/display/dc/dc.h | 29 +++--
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 29 +++++
drivers/gpu/drm/amd/display/dc/dc_plane.h | 2 +-
drivers/gpu/drm/amd/display/dc/dc_state.h | 6 +-
.../gpu/drm/amd/display/dc/dc_state_priv.h | 12 +-
drivers/gpu/drm/amd/display/dc/dc_stream.h | 2 +-
drivers/gpu/drm/amd/display/dc/dc_types.h | 2 +-
.../drm/amd/display/dc/dcn10/dcn10_hubbub.c | 8 +-
.../drm/amd/display/dc/dcn10/dcn10_hubbub.h | 10 +-
.../drm/amd/display/dc/dcn20/dcn20_hubbub.c | 2 +-
.../drm/amd/display/dc/dcn20/dcn20_hubbub.h | 2 +-
.../drm/amd/display/dc/dcn201/dcn201_hubbub.c | 2 +-
.../drm/amd/display/dc/dcn21/dcn21_hubbub.c | 8 +-
.../drm/amd/display/dc/dcn21/dcn21_hubbub.h | 8 +-
.../drm/amd/display/dc/dcn30/dcn30_hubbub.c | 2 +-
.../drm/amd/display/dc/dcn30/dcn30_hubbub.h | 2 +-
.../gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c | 54 ++++---- .../gpu/drm/amd/display/dc/dcn30/dcn30_mpc.h | 14 +-
.../drm/amd/display/dc/dcn31/dcn31_hubbub.c | 8 +-
.../drm/amd/display/dc/dcn32/dcn32_hubbub.c | 10 +-
.../drm/amd/display/dc/dcn32/dcn32_hubbub.h | 8 +-
.../gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c | 5 +-
.../display/dc/dcn32/dcn32_resource_helpers.c | 23 +---
.../drm/amd/display/dc/dcn35/dcn35_hubbub.c | 4 +-
.../drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 9 +-
.../drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 10 +-
.../drm/amd/display/dc/dml/dcn35/dcn35_fpu.c | 2 +-
.../display/dc/dml2/dml2_dc_resource_mgmt.c | 23 ++--
.../display/dc/dml2/dml2_translation_helper.c | 14 +-
.../gpu/drm/amd/display/dc/dml2/dml2_utils.c | 5 +
.../drm/amd/display/dc/dml2/dml2_wrapper.c | 9 ++
.../drm/amd/display/dc/dml2/dml2_wrapper.h | 28 +++-
.../drm/amd/display/dc/dpp/dcn20/dcn20_dpp.h | 2 +-
.../amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c | 10 +-
.../drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c | 10 +- .../amd/display/dc/hwss/dce110/dce110_hwseq.c | 44 ++++---
.../amd/display/dc/hwss/dcn10/dcn10_hwseq.c | 24 ++--
.../amd/display/dc/hwss/dcn20/dcn20_hwseq.c | 84 ++++++------
.../amd/display/dc/hwss/dcn30/dcn30_hwseq.c | 66 +++++-----
.../amd/display/dc/hwss/dcn30/dcn30_hwseq.h | 5 +-
.../amd/display/dc/hwss/dcn314/dcn314_hwseq.c | 41 ------
.../amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 122 ++++++------------
.../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 57 --------
.../amd/display/dc/hwss/dcn35/dcn35_hwseq.h | 3 -
.../amd/display/dc/hwss/dcn35/dcn35_init.c | 2 -
.../amd/display/dc/hwss/dcn351/dcn351_init.c | 2 -
.../drm/amd/display/dc/hwss/hw_sequencer.h | 7 +-
.../gpu/drm/amd/display/dc/inc/core_types.h | 5 +-
.../gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 2 -
.../gpu/drm/amd/display/dc/inc/hw/dchubbub.h | 2 +-
drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 2 +-
.../gpu/drm/amd/display/dc/inc/hw/hw_shared.h | 2 +-
.../gpu/drm/amd/display/dc/inc/hw/mem_input.h | 12 +- drivers/gpu/drm/amd/display/dc/inc/resource.h | 17 +++
.../dc/resource/dcn32/dcn32_resource.c | 41 +++---
.../dc/resource/dcn32/dcn32_resource.h | 6 +-
.../dc/resource/dcn321/dcn321_resource.c | 25 +---
.../dc/resource/dcn35/dcn35_resource.c | 10 +-
.../dc/resource/dcn351/dcn351_resource.c | 10 +-
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 40 +++++-
71 files changed, 669 insertions(+), 743 deletions(-)
--
2.34.1
