On Tue, Mar 19, 2024 at 2:54 AM Christian König <christian.koenig@xxxxxxx> wrote:Well what problems do you run into? The ACPI and BIOS assignments usually work much better than whatever the Linux PCI subsystem comes up with.Perhaps its easier to show the lspci output for the BIOS assignment and we can agree it's far from helpful +-04.1-[64-c3]----00.0-[65-68]--+-01.0-[66]----00.0-[67]----00.0 Intel Corporation JHL7540 Thunderbolt 3 USB Controller [Titan Ridge DD 2018] | +-02.0-[67]-- | \-04.0-[68]-- In this case the bios has assigned the upstream port 65-68, for its 3 downstreams 66,67,68, and then assigned the upstream port of the device's own bridge to 67. In this case not only did BIOS produce an invalid topology but it also does not provide any space at the first upstream or downstream ports which the current PCI implementation would require to assign bus numbers if I understand it correctly.
Can you provide the full output of lspci -vvvv. As far as I can see that doesn't looks so invalid to me.
The PCI subsystem in the Linux kernel for example can't handle back to back resources behind multiple downstream bridges. So when the BIOS fails to assign something it's extremely unlikely that the Linux kernel will do the right thing either.I'm not sure this is still the case, the PCI subsystem with realloc (and assign-busses for x86) deals with enumerating this topology which reports multiple bridges just fine.
Well that is just a very very old workaround for a buggy BIOS on 20 year old laptops. The last reference I could find for hardware which actually needed it is this:
commit 8c4b2cf9af9b4ecc29d4f0ec4ecc8e94dc4432d7
Author: Bernhard Kaindl <bk@xxxxxxx>
Date: Sat Feb 18 01:36:55 2006 -0800
[PATCH] PCI: PCI/Cardbus cards hidden, needs pci=assign-busses to fix
So as far as I know nobody had to use that in ages and I wouldn't expect that this option actually works correctly on any modern hardware.
Especially not anything PCIe based since it messes up the ACPI to PCIe device mappings. That amdgpu doesn't work is just the tip of the iceberg here.
The same configuration as above
produces this bus numbering (with hpbussize=20)
+-04.1-[24-66]----00.0-[25-66]--+-01.0-[26-45]----00.0-[27-29]--+-01.0-[28]----00.0
Intel Corporation DG2 [Arc A750]
| |
\-04.0-[29]----00.0 Intel Corporation DG2 Audio Controller
| +-02.0-[46]----00.0 Intel
Corporation JHL7540 Thunderbolt 3 USB Controller [Titan Ridge DD 2018]
| \-04.0-[47-66]--
The Linux kernel doesnt do the right thing without these features, and
these are not the default. So you may be right that by default it does
not recover from the situation of well.
Given the bus allocation at the root port I can imagine a more
aggressive than default but less aggressive than `assign-busses`
reallocation scheme could deal with both preserving root allocations
like the APU and renumbering things behind upstream ports. That might
be a better approach than renumbering even the root bus devices.
The bus assignment code in the PCI subsystem is made to support hotplug, not completely re-number the root hubs from scratch. That is just a hack somebody came up with two decades ago to get some Cardbus slots in laptops working.
I'm not sure yet what's going wrong with the Thunderbold controller, but completely re-assigning bus numbers is certainly the wrong approach.
Regards,
Christian.
Regards, Christian.
