RE: [PATCH] drm/amdgpu: Bypass display ta if it is harvested

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[AMD Official Use Only - General]

Copy @Deucher, Alexander for the awareness.
 
Regards,
Hawking
 
-----Original Message-----
From: Zhang, Hawking <Hawking.Zhang@xxxxxxx>
Sent: Thursday, March 14, 2024 18:36
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Feng, Kenneth <Kenneth.Feng@xxxxxxx>
Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>
Subject: [PATCH] drm/amdgpu: Bypass display ta if it is harvested
 
Display TA doesn't need to be loaded/invoked if it is harvested.
 
Signed-off-by: Hawking Zhang <Hawking.Zhang@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 867397fe2e9d..bb4988c45ca9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1830,6 +1830,10 @@ static int psp_hdcp_initialize(struct psp_context *psp)
         if (amdgpu_sriov_vf(psp->adev))
                 return 0;
 
+       /* bypass hdcp initialization if dmu is harvested */
+       if (psp->adev->harvest_ip_mask & AMD_HARVEST_IP_DMU_MASK)
+               return 0;
+
         if (!psp->hdcp_context.context.bin_desc.size_bytes ||
             !psp->hdcp_context.context.bin_desc.start_addr) {
                 dev_info(psp->adev->dev, "HDCP: optional hdcp ta ucode is not available\n"); @@ -1862,6 +1866,9 @@ int psp_hdcp_invoke(struct psp_context *psp, uint32_t ta_cmd_id)
         if (amdgpu_sriov_vf(psp->adev))
                 return 0;
 
+       if (!psp->hdcp_context.context.initialized)
+               return 0;
+
         return psp_ta_invoke(psp, ta_cmd_id, &psp->hdcp_context.context);  }
 
@@ -1897,6 +1904,10 @@ static int psp_dtm_initialize(struct psp_context *psp)
         if (amdgpu_sriov_vf(psp->adev))
                 return 0;
 
+       /* bypass dtm initialization if dmu is harvested */
+       if (psp->adev->harvest_ip_mask & AMD_HARVEST_IP_DMU_MASK)
+               return 0;
+
         if (!psp->dtm_context.context.bin_desc.size_bytes ||
             !psp->dtm_context.context.bin_desc.start_addr) {
                 dev_info(psp->adev->dev, "DTM: optional dtm ta ucode is not available\n"); @@ -1929,6 +1940,9 @@ int psp_dtm_invoke(struct psp_context *psp, uint32_t ta_cmd_id)
         if (amdgpu_sriov_vf(psp->adev))
                 return 0;
 
+       if (!psp->dtm_context.context.initialized)
+               return 0;
+
         return psp_ta_invoke(psp, ta_cmd_id, &psp->dtm_context.context);  }
 
@@ -2063,6 +2077,10 @@ static int psp_securedisplay_initialize(struct psp_context *psp)
         if (amdgpu_sriov_vf(psp->adev))
                 return 0;
 
+       /* bypass securedisplay initialization if dmu is harvested */
+       if (psp->adev->harvest_ip_mask & AMD_HARVEST_IP_DMU_MASK)
+                return 0;
+
         if (!psp->securedisplay_context.context.bin_desc.size_bytes ||
             !psp->securedisplay_context.context.bin_desc.start_addr) {
                 dev_info(psp->adev->dev, "SECUREDISPLAY: securedisplay ta ucode is not available\n");
--
2.17.1
 

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