[AMD Official Use Only - General]
> -----Original Message-----
> From: Dhume, Samir <Samir.Dhume@xxxxxxx>
> Sent: Monday, March 4, 2024 10:20 AM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Dhume, Samir <Samir.Dhume@xxxxxxx>; Lazar, Lijo
> <Lijo.Lazar@xxxxxxx>; Wan, Gavin <Gavin.Wan@xxxxxxx>; Liu, Leo
> <Leo.Liu@xxxxxxx>; Deucher, Alexander <Alexander.Deucher@xxxxxxx>
> Subject: [PATCH 3/3] drm/amdgpu/jpeg: support for sriov cpx mode
>
> Signed-off-by: Samir Dhume <samir.dhume@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 80 +++++++++++++++++++++-
> --
> 1 file changed, 73 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> index 32caeb37cef9..4bf087f8ca2b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
> @@ -65,9 +65,15 @@ static int amdgpu_ih_srcid_jpeg[] = { static int
> jpeg_v4_0_3_early_init(void *handle) {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> + struct amdgpu_xcp_mgr *xcp_mgr = adev->xcp_mgr;
In general, to make the path clear, can we define and use the SRIOV specific variables and function within "amdgpu_sriov_vf()" ?
Regards,
Leo
>
> adev->jpeg.num_jpeg_rings = AMDGPU_MAX_JPEG_RINGS;
>
> + if (amdgpu_sriov_vf(adev))
> + if (adev->xcp_mgr->funcs->query_partition_mode(xcp_mgr) ==
> + AMDGPU_CPX_PARTITION_MODE)
> + adev->jpeg.num_jpeg_rings = 4;
> +
> jpeg_v4_0_3_set_dec_ring_funcs(adev);
> jpeg_v4_0_3_set_irq_funcs(adev);
> jpeg_v4_0_3_set_ras_funcs(adev);
> @@ -88,10 +94,28 @@ static int jpeg_v4_0_3_sw_init(void *handle)
> struct amdgpu_ring *ring;
> int i, j, r, jpeg_inst;
>
> + bool sriov_cpx_odd = false;
> + struct amdgpu_xcp_mgr *xcp_mgr = adev->xcp_mgr;
> + int mode;
> +
> + if (amdgpu_sriov_vf(adev)) {
> + mode = xcp_mgr->funcs->query_partition_mode(xcp_mgr);
> +
> + if (mode == AMDGPU_CPX_PARTITION_MODE) {
> + if (adev->gfx.funcs->get_xcc_id(adev, 0) & 0x1)
> + sriov_cpx_odd = true;
> + }
> + }
> +
> for (j = 0; j < adev->jpeg.num_jpeg_rings; ++j) {
> /* JPEG TRAP */
> - r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN,
> + if (!sriov_cpx_odd)
> + r = amdgpu_irq_add_id(adev,
> SOC15_IH_CLIENTID_VCN,
> amdgpu_ih_srcid_jpeg[j], &adev->jpeg.inst-
> >irq);
> + else
> + r = amdgpu_irq_add_id(adev,
> SOC15_IH_CLIENTID_VCN,
> + amdgpu_ih_srcid_jpeg[j+4], &adev->jpeg.inst-
> >irq);
> +
> if (r)
> return r;
> }
> @@ -116,10 +140,15 @@ static int jpeg_v4_0_3_sw_init(void *handle)
> (adev-
> >doorbell_index.vcn.vcn_ring0_1 << 1) +
> 1 + j + 9 * jpeg_inst;
> } else {
> - if (j < 4)
> + if ((j < 4) && (!sriov_cpx_odd))
> ring->doorbell_index =
> (adev-
> >doorbell_index.vcn.vcn_ring0_1 << 1) +
> 4 + j + 32 * jpeg_inst;
> + else if (sriov_cpx_odd)
> + ring->doorbell_index =
> + (adev-
> >doorbell_index.vcn.vcn_ring0_1 << 1) +
> + 12 + j + 32 * jpeg_inst;
> +
> else
> ring->doorbell_index =
> (adev-
> >doorbell_index.vcn.vcn_ring0_1 << 1) + @@ -186,6 +215,9 @@ static int
> jpeg_v4_0_3_start_sriov(struct amdgpu_device *adev)
> uint32_t size, size_dw, item_offset;
> uint32_t init_status;
> int i, j, jpeg_inst;
> + struct amdgpu_xcp_mgr *xcp_mgr = adev->xcp_mgr;
> + int mode;
> + bool cpx_odd = false;
>
> struct mmsch_v4_0_cmd_direct_write
> direct_wt = { {0} };
> @@ -197,6 +229,13 @@ static int jpeg_v4_0_3_start_sriov(struct
> amdgpu_device *adev)
> end.cmd_header.command_type =
> MMSCH_COMMAND__END;
>
> + mode = xcp_mgr->funcs->query_partition_mode(xcp_mgr);
> +
> + if (mode == AMDGPU_CPX_PARTITION_MODE) {
> + if (adev->gfx.funcs->get_xcc_id(adev, 0) & 0x1)
> + cpx_odd = true;
> + }
> +
> for (i = 0; i < adev->jpeg.num_jpeg_inst; i++) {
> jpeg_inst = GET_INST(JPEG, i);
>
> @@ -220,10 +259,14 @@ static int jpeg_v4_0_3_start_sriov(struct
> amdgpu_device *adev)
> tmp = SOC15_REG_OFFSET(JPEG, 0,
> regUVD_JRBC0_UVD_JRBC_RB_SIZE);
> MMSCH_V4_0_INSERT_DIRECT_WT(tmp, ring-
> >ring_size / 4);
>
> - if (j <= 3) {
> + if ((j <= 3) && (!cpx_odd)) {
> header.mjpegdec0[j].table_offset =
> item_offset;
> header.mjpegdec0[j].init_status = 0;
> header.mjpegdec0[j].table_size = table_size;
> + } else if (cpx_odd) {
> + header.mjpegdec1[j].table_offset =
> item_offset;
> + header.mjpegdec1[j].init_status = 0;
> + header.mjpegdec1[j].table_size = table_size;
> } else {
> header.mjpegdec1[j - 4].table_offset =
> item_offset;
> header.mjpegdec1[j - 4].init_status = 0; @@ -
> 986,6 +1029,16 @@ static int jpeg_v4_0_3_process_interrupt(struct
> amdgpu_device *adev,
> struct amdgpu_iv_entry *entry) {
> uint32_t i, inst;
> + struct amdgpu_xcp_mgr *xcp_mgr = adev->xcp_mgr;
> + int mode;
> + bool sriov_cpx_odd = false;
> +
> + mode = xcp_mgr->funcs->query_partition_mode(xcp_mgr);
> +
> + if (mode == AMDGPU_CPX_PARTITION_MODE) {
> + if (adev->gfx.funcs->get_xcc_id(adev, 0) & 0x1)
> + sriov_cpx_odd = true;
> + }
>
> i = node_id_to_phys_map[entry->node_id];
> DRM_DEV_DEBUG(adev->dev, "IH: JPEG TRAP\n"); @@ -1015,16
> +1068,29 @@ static int jpeg_v4_0_3_process_interrupt(struct amdgpu_device
> *adev,
> amdgpu_fence_process(&adev->jpeg.inst[inst].ring_dec[3]);
> break;
> case VCN_4_0__SRCID__JPEG4_DECODE:
> - amdgpu_fence_process(&adev->jpeg.inst[inst].ring_dec[4]);
> + if (!sriov_cpx_odd)
> + amdgpu_fence_process(&adev-
> >jpeg.inst[inst].ring_dec[4]);
> + else
> + amdgpu_fence_process(&adev-
> >jpeg.inst[inst].ring_dec[0]);
> +
> break;
> case VCN_4_0__SRCID__JPEG5_DECODE:
> - amdgpu_fence_process(&adev->jpeg.inst[inst].ring_dec[5]);
> + if (!sriov_cpx_odd)
> + amdgpu_fence_process(&adev-
> >jpeg.inst[inst].ring_dec[5]);
> + else
> + amdgpu_fence_process(&adev-
> >jpeg.inst[inst].ring_dec[1]);
> break;
> case VCN_4_0__SRCID__JPEG6_DECODE:
> - amdgpu_fence_process(&adev->jpeg.inst[inst].ring_dec[6]);
> + if (!sriov_cpx_odd)
> + amdgpu_fence_process(&adev-
> >jpeg.inst[inst].ring_dec[6]);
> + else
> + amdgpu_fence_process(&adev-
> >jpeg.inst[inst].ring_dec[2]);
> break;
> case VCN_4_0__SRCID__JPEG7_DECODE:
> - amdgpu_fence_process(&adev->jpeg.inst[inst].ring_dec[7]);
> + if (!sriov_cpx_odd)
> + amdgpu_fence_process(&adev-
> >jpeg.inst[inst].ring_dec[7]);
> + else
> + amdgpu_fence_process(&adev-
> >jpeg.inst[inst].ring_dec[3]);
> break;
> default:
> DRM_DEV_ERROR(adev->dev, "Unhandled interrupt: %d
> %d\n",
> --
> 2.34.1
