[AMD Official Use Only - General]
> -----Original Message-----
> From: Zhang, Hawking <Hawking.Zhang@xxxxxxx>
> Sent: Tuesday, January 2, 2024 1:38 PM
> To: Wang, Yang(Kevin) <KevinYang.Wang@xxxxxxx>; amd-
> gfx@xxxxxxxxxxxxxxxxxxxxx; Zhou1, Tao <Tao.Zhou1@xxxxxxx>; Yang, Stanley
> <Stanley.Yang@xxxxxxx>; Chai, Thomas <YiPeng.Chai@xxxxxxx>; Li, Candice
> <Candice.Li@xxxxxxx>
> Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Lazar, Lijo
> <Lijo.Lazar@xxxxxxx>; Ma, Le <Le.Ma@xxxxxxx>
> Subject: RE: [PATCH 2/3] drm/amdgpu: Query ras capablity from psp
>
> [AMD Official Use Only - General]
>
> The ret gives us a chance to fallback to legacy query approach (from vbios).
>
>
> You might want to see patch #3 of the series for more details, go to the following
> lines in patch #3
>
> + /* query ras capability from psp */
> + if (amdgpu_psp_get_ras_capability(&adev->psp))
> + goto init_ras_enabled_flag;
>
>
> Regards,
> Hawking
>
> -----Original Message-----
> From: Wang, Yang(Kevin) <KevinYang.Wang@xxxxxxx>
> Sent: Tuesday, January 2, 2024 13:19
> To: Zhang, Hawking <Hawking.Zhang@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx;
> Zhou1, Tao <Tao.Zhou1@xxxxxxx>; Yang, Stanley <Stanley.Yang@xxxxxxx>;
> Chai, Thomas <YiPeng.Chai@xxxxxxx>; Li, Candice <Candice.Li@xxxxxxx>
> Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>; Deucher, Alexander
> <Alexander.Deucher@xxxxxxx>; Lazar, Lijo <Lijo.Lazar@xxxxxxx>; Ma, Le
> <Le.Ma@xxxxxxx>
> Subject: RE: [PATCH 2/3] drm/amdgpu: Query ras capablity from psp
>
> [AMD Official Use Only - General]
>
> -----Original Message-----
> From: Hawking Zhang <Hawking.Zhang@xxxxxxx>
> Sent: Tuesday, January 2, 2024 11:45 AM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Zhou1, Tao <Tao.Zhou1@xxxxxxx>; Yang,
> Stanley <Stanley.Yang@xxxxxxx>; Wang, Yang(Kevin)
> <KevinYang.Wang@xxxxxxx>; Chai, Thomas <YiPeng.Chai@xxxxxxx>; Li,
> Candice <Candice.Li@xxxxxxx>
> Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>; Deucher, Alexander
> <Alexander.Deucher@xxxxxxx>; Lazar, Lijo <Lijo.Lazar@xxxxxxx>; Ma, Le
> <Le.Ma@xxxxxxx>
> Subject: [PATCH 2/3] drm/amdgpu: Query ras capablity from psp
>
> Instead of traditional atomfirmware interfaces for RAS capability, host driver can
> query ras capability from psp starting from psp v13_0_6.
>
> Signed-off-by: Hawking Zhang <Hawking.Zhang@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 13 +++++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 2 ++
> drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 26 +++++++++++++++++++++++++
> 3 files changed, 41 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index 94b536e3cada..8a3847d3041f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -2125,6 +2125,19 @@ int amdgpu_psp_wait_for_bootloader(struct
> amdgpu_device *adev)
> return ret;
> }
>
> +bool amdgpu_psp_get_ras_capability(struct psp_context *psp) {
> + bool ret;
> +
> + if (psp->funcs &&
> + psp->funcs->get_ras_capability) {
> + ret = psp->funcs->get_ras_capability(psp);
> + return ret;
[Tao] I think the code can be simplified as:
return psp->funcs->get_ras_capability(psp);
and drop the ret variable.
> [kevin]:
> This variable 'ret' seems to have no other purpose, can we remove it and return
> directly ?
>
> Best Regards,
> Kevin
> + } else {
> + return false;
> + }
> +}
> +
> static int psp_hw_start(struct psp_context *psp) {
> struct amdgpu_device *adev = psp->adev; diff --git
> a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> index 09d1f8f72a9c..652b0a01854a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> @@ -134,6 +134,7 @@ struct psp_funcs {
> int (*update_spirom)(struct psp_context *psp, uint64_t fw_pri_mc_addr);
> int (*vbflash_stat)(struct psp_context *psp);
> int (*fatal_error_recovery_quirk)(struct psp_context *psp);
> + bool (*get_ras_capability)(struct psp_context *psp);
> };
>
> struct ta_funcs {
> @@ -537,4 +538,5 @@ int psp_spatial_partition(struct psp_context *psp, int
> mode); int is_psp_fw_valid(struct psp_bin_desc bin);
>
> int amdgpu_psp_wait_for_bootloader(struct amdgpu_device *adev);
> +bool amdgpu_psp_get_ras_capability(struct psp_context *psp);
> #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
> b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
> index 676bec2cc157..722b6066ce07 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
> @@ -27,6 +27,7 @@
> #include "amdgpu_ucode.h"
> #include "soc15_common.h"
> #include "psp_v13_0.h"
> +#include "amdgpu_ras.h"
>
> #include "mp/mp_13_0_2_offset.h"
> #include "mp/mp_13_0_2_sh_mask.h"
> @@ -770,6 +771,30 @@ static int psp_v13_0_fatal_error_recovery_quirk(struct
> psp_context *psp)
> return 0;
> }
>
> +static bool psp_v13_0_get_ras_capability(struct psp_context *psp) {
> + struct amdgpu_device *adev = psp->adev;
> + struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
> + u32 reg_data;
> +
> + /* query ras cap should be done from host side */
> + if (amdgpu_sriov_vf(adev))
> + return false;
> +
> + if (!con)
> + return false;
> +
> + if ((amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6)) &&
> + (!(adev->flags & AMD_IS_APU))) {
> + reg_data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_127);
> + adev->ras_hw_enabled = (reg_data & GENMASK_ULL(23, 0));
> + con->poison_supported = ((reg_data & GENMASK_ULL(24, 24)) >> 24) ?
> true : false;
> + return true;
> + } else {
> + return false;
> + }
> +}
> +
> static const struct psp_funcs psp_v13_0_funcs = {
> .init_microcode = psp_v13_0_init_microcode,
> .wait_for_bootloader = psp_v13_0_wait_for_bootloader_steady_state,
> @@ -792,6 +817,7 @@ static const struct psp_funcs psp_v13_0_funcs = {
> .update_spirom = psp_v13_0_update_spirom,
> .vbflash_stat = psp_v13_0_vbflash_status,
> .fatal_error_recovery_quirk = psp_v13_0_fatal_error_recovery_quirk,
> + .get_ras_capability = psp_v13_0_get_ras_capability,
> };
>
> void psp_v13_0_set_psp_funcs(struct psp_context *psp)
> --
> 2.17.1
>
>
