Fixes the following gcc with W=1:
drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c:1124: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
Cc: Charlene Liu <charlene.liu@xxxxxxx>
Cc: Muhammad Ahmed <ahmed.ahmed@xxxxxxx>
Cc: Hamza Mahfooz <hamza.mahfooz@xxxxxxx>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@xxxxxxx>
Cc: Aurabindo Pillai <aurabindo.pillai@xxxxxxx>
Cc: Alex Deucher <alexander.deucher@xxxxxxx>
Cc: Srinath Rao <srinath.rao@xxxxxxx>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@xxxxxxx>
---
v2:
- Added explaination for power down & power up sequence (Rodrigo)
- Removed documenting return void. (Rodrigo)
.../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 68 +++++++++++--------
1 file changed, 41 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
index ad710b4036de..1cb61c46d911 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
@@ -1120,21 +1120,28 @@ void dcn35_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,
update_state->pg_res_update[PG_HPO] = true;
}
+
/**
- * power down sequence
- * ONO Region 3, DCPG 25: hpo - SKIPPED
- * ONO Region 4, DCPG 0: dchubp0, dpp0
- * ONO Region 6, DCPG 1: dchubp1, dpp1
- * ONO Region 8, DCPG 2: dchubp2, dpp2
- * ONO Region 10, DCPG 3: dchubp3, dpp3
- * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will pwr dwn at IPS2 entry
- * ONO Region 5, DCPG 16: dsc0
- * ONO Region 7, DCPG 17: dsc1
- * ONO Region 9, DCPG 18: dsc2
- * ONO Region 11, DCPG 19: dsc3
- * ONO Region 2, DCPG 24: mpc opp optc dwb
- * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED. will be pwr dwn after lono timer is armed
-*/
+ * dcn35_hw_block_power_down() - power down sequence
+ *
+ * The following sequence describes the ON-OFF (ONO) for power down:
+ *
+ * ONO Region 3, DCPG 25: hpo - SKIPPED
+ * ONO Region 4, DCPG 0: dchubp0, dpp0
+ * ONO Region 6, DCPG 1: dchubp1, dpp1
+ * ONO Region 8, DCPG 2: dchubp2, dpp2
+ * ONO Region 10, DCPG 3: dchubp3, dpp3
+ * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will pwr dwn at IPS2 entry
+ * ONO Region 5, DCPG 16: dsc0
+ * ONO Region 7, DCPG 17: dsc1
+ * ONO Region 9, DCPG 18: dsc2
+ * ONO Region 11, DCPG 19: dsc3
+ * ONO Region 2, DCPG 24: mpc opp optc dwb
+ * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED. will be pwr dwn after lono timer is armed
+ *
+ * @dc: Current DC state
+ * @update_state: update PG sequence states for HW block
+ */
void dcn35_hw_block_power_down(struct dc *dc,
struct pg_block_update *update_state)
{
@@ -1172,20 +1179,27 @@ void dcn35_hw_block_power_down(struct dc *dc,
//domain22, 23, 25 currently always on.
}
+
/**
- * power up sequence
- * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED
- * ONO Region 2, DCPG 24: mpc opp optc dwb
- * ONO Region 5, DCPG 16: dsc0
- * ONO Region 7, DCPG 17: dsc1
- * ONO Region 9, DCPG 18: dsc2
- * ONO Region 11, DCPG 19: dsc3
- * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will power up at IPS2 exit
- * ONO Region 4, DCPG 0: dchubp0, dpp0
- * ONO Region 6, DCPG 1: dchubp1, dpp1
- * ONO Region 8, DCPG 2: dchubp2, dpp2
- * ONO Region 10, DCPG 3: dchubp3, dpp3
- * ONO Region 3, DCPG 25: hpo - SKIPPED
+ * dcn35_hw_block_power_up() - power up sequence
+ *
+ * The following sequence describes the ON-OFF (ONO) for power up:
+ *
+ * ONO Region 0, DCPG 22: dccg dio dcio - SKIPPED
+ * ONO Region 2, DCPG 24: mpc opp optc dwb
+ * ONO Region 5, DCPG 16: dsc0
+ * ONO Region 7, DCPG 17: dsc1
+ * ONO Region 9, DCPG 18: dsc2
+ * ONO Region 11, DCPG 19: dsc3
+ * ONO Region 1, DCPG 23: dchubbub dchvm dchubbubmem - SKIPPED. PMFW will power up at IPS2 exit
+ * ONO Region 4, DCPG 0: dchubp0, dpp0
+ * ONO Region 6, DCPG 1: dchubp1, dpp1
+ * ONO Region 8, DCPG 2: dchubp2, dpp2
+ * ONO Region 10, DCPG 3: dchubp3, dpp3
+ * ONO Region 3, DCPG 25: hpo - SKIPPED
+ *
+ * @dc: Current DC state
+ * @update_state: update PG sequence states for HW block
*/
void dcn35_hw_block_power_up(struct dc *dc,
struct pg_block_update *update_state)
