On Tue, Feb 28, 2017 at 5:14 PM, Andres Rodriguez <andresx7 at gmail.com> wrote:
> Keep track of a ring's HW IP block so we can identify it later.
>
I think this patch can be dropped. We already store the ring type in
ring->funcs->type. We also shouldn't expose KIQ as a type to
userspace.
Alex
> Signed-off-by: Andres Rodriguez <andresx7 at gmail.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 3 ++-
> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 5 +++--
> drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 8 ++++----
> drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/si_dma.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 3 ++-
> drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 3 ++-
> drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 3 ++-
> drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 3 ++-
> include/uapi/drm/amdgpu_drm.h | 3 ++-
> 15 files changed, 28 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> index 7c842b7..4ff762c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> @@ -157,21 +157,21 @@ void amdgpu_ring_undo(struct amdgpu_ring *ring)
> *
> * @adev: amdgpu_device pointer
> * @ring: amdgpu_ring structure holding ring information
> * @max_ndw: maximum number of dw for ring alloc
> * @nop: nop packet for this ring
> *
> * Initialize the driver information for the selected ring (all asics).
> * Returns 0 on success, error on failure.
> */
> int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
> - unsigned max_dw, struct amdgpu_irq_src *irq_src,
> + int hw_ip, unsigned max_dw, struct amdgpu_irq_src *irq_src,
> unsigned irq_type)
> {
> int r;
>
> if (ring->adev == NULL) {
> if (adev->num_rings >= AMDGPU_MAX_RINGS)
> return -EINVAL;
>
> ring->adev = adev;
> ring->idx = adev->num_rings++;
> @@ -227,20 +227,21 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
> &ring->gpu_addr,
> (void **)&ring->ring);
> if (r) {
> dev_err(adev->dev, "(%d) ring create failed\n", r);
> return r;
> }
> memset((void *)ring->ring, 0, ring->ring_size);
> }
> ring->ptr_mask = (ring->ring_size / 4) - 1;
> ring->max_dw = max_dw;
> + ring->hw_ip = hw_ip;
>
> if (amdgpu_debugfs_ring_init(adev, ring)) {
> DRM_ERROR("Failed to register debugfs file for rings !\n");
> }
> return 0;
> }
>
> /**
> * amdgpu_ring_fini - tear down the driver ring struct.
> *
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> index 2345b398..3ff021f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> @@ -150,20 +150,21 @@ struct amdgpu_ring {
> unsigned rptr_offs;
> unsigned wptr;
> unsigned wptr_old;
> unsigned ring_size;
> unsigned max_dw;
> int count_dw;
> uint64_t gpu_addr;
> uint32_t ptr_mask;
> bool ready;
> u32 idx;
> + u32 hw_ip;
> u32 me;
> u32 pipe;
> u32 queue;
> struct amdgpu_bo *mqd_obj;
> u32 doorbell_index;
> bool use_doorbell;
> unsigned wptr_offs;
> unsigned fence_offs;
> uint64_t current_ctx;
> char name[16];
> @@ -174,15 +175,15 @@ struct amdgpu_ring {
> struct dentry *ent;
> #endif
> };
>
> int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw);
> void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count);
> void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
> void amdgpu_ring_commit(struct amdgpu_ring *ring);
> void amdgpu_ring_undo(struct amdgpu_ring *ring);
> int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
> - unsigned ring_size, struct amdgpu_irq_src *irq_src,
> - unsigned irq_type);
> + int hw_ip, unsigned ring_size,
> + struct amdgpu_irq_src *irq_src, unsigned irq_type);
> void amdgpu_ring_fini(struct amdgpu_ring *ring);
>
> #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
> index 810bba5..64b6cb7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
> +++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
> @@ -935,21 +935,21 @@ static int cik_sdma_sw_init(void *handle)
>
> /* SDMA Privileged inst */
> r = amdgpu_irq_add_id(adev, 247, &adev->sdma.illegal_inst_irq);
> if (r)
> return r;
>
> for (i = 0; i < adev->sdma.num_instances; i++) {
> ring = &adev->sdma.instance[i].ring;
> ring->ring_obj = NULL;
> sprintf(ring->name, "sdma%d", i);
> - r = amdgpu_ring_init(adev, ring, 1024,
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_DMA, 1024,
> &adev->sdma.trap_irq,
> (i == 0) ?
> AMDGPU_SDMA_IRQ_TRAP0 :
> AMDGPU_SDMA_IRQ_TRAP1);
> if (r)
> return r;
> }
>
> return r;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> index 2086e7e..09ed842 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> @@ -3261,21 +3261,21 @@ static int gfx_v6_0_sw_init(void *handle)
> r = gfx_v6_0_rlc_init(adev);
> if (r) {
> DRM_ERROR("Failed to init rlc BOs!\n");
> return r;
> }
>
> for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
> ring = &adev->gfx.gfx_ring[i];
> ring->ring_obj = NULL;
> sprintf(ring->name, "gfx");
> - r = amdgpu_ring_init(adev, ring, 1024,
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_GFX, 1024,
> &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP);
> if (r)
> return r;
> }
>
> for (i = 0; i < adev->gfx.num_compute_rings; i++) {
> unsigned irq_type;
>
> if ((i >= 32) || (i >= AMDGPU_MAX_COMPUTE_RINGS)) {
> DRM_ERROR("Too many (%d) compute rings!\n", i);
> @@ -3283,21 +3283,21 @@ static int gfx_v6_0_sw_init(void *handle)
> }
> ring = &adev->gfx.compute_ring[i];
> ring->ring_obj = NULL;
> ring->use_doorbell = false;
> ring->doorbell_index = 0;
> ring->me = 1;
> ring->pipe = i;
> ring->queue = i;
> sprintf(ring->name, "comp %d.%d.%d", ring->me, ring->pipe, ring->queue);
> irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP + ring->pipe;
> - r = amdgpu_ring_init(adev, ring, 1024,
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_COMPUTE, 1024,
> &adev->gfx.eop_irq, irq_type);
> if (r)
> return r;
> }
>
> return r;
> }
>
> static int gfx_v6_0_sw_fini(void *handle)
> {
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> index b0b0c89..c76dcc8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> @@ -4742,21 +4742,21 @@ static int gfx_v7_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
> ring->ring_obj = NULL;
> ring->use_doorbell = true;
> ring->doorbell_index = AMDGPU_DOORBELL_MEC_RING0 + ring_id;
> sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);
>
> irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP
> + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec)
> + ring->pipe;
>
> /* type-2 packets are deprecated on MEC, use type-3 instead */
> - r = amdgpu_ring_init(adev, ring, 1024,
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_COMPUTE, 1024,
> &adev->gfx.eop_irq, irq_type);
> if (r)
> return r;
>
>
> return 0;
> }
>
> static int gfx_v7_0_sw_init(void *handle)
> {
> @@ -4797,21 +4797,21 @@ static int gfx_v7_0_sw_init(void *handle)
> r = gfx_v7_0_mec_init(adev);
> if (r) {
> DRM_ERROR("Failed to init MEC BOs!\n");
> return r;
> }
>
> for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
> ring = &adev->gfx.gfx_ring[i];
> ring->ring_obj = NULL;
> sprintf(ring->name, "gfx");
> - r = amdgpu_ring_init(adev, ring, 1024,
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_GFX, 1024,
> &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP);
> if (r)
> return r;
> }
>
> /* set up the compute queues - allocate horizontally across pipes */
> ring_id = 0;
> for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; ++i) {
> for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) {
> for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) {
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 5db5bac..a778d58 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -1392,21 +1392,21 @@ static int gfx_v8_0_kiq_init_ring(struct amdgpu_device *adev,
> ring->me = 2;
> ring->pipe = 0;
> } else {
> ring->me = 1;
> ring->pipe = 1;
> }
>
> irq->data = ring;
> ring->queue = 0;
> sprintf(ring->name, "kiq %d.%d.%d", ring->me, ring->pipe, ring->queue);
> - r = amdgpu_ring_init(adev, ring, 1024,
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_KIQ, 1024,
> irq, AMDGPU_CP_KIQ_IRQ_DRIVER0);
> if (r)
> dev_warn(adev->dev, "(%d) failed to init kiq ring\n", r);
>
> return r;
> }
>
> static void gfx_v8_0_kiq_free_ring(struct amdgpu_ring *ring,
> struct amdgpu_irq_src *irq)
> {
> @@ -2139,21 +2139,21 @@ static int gfx_v8_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
> ring->ring_obj = NULL;
> ring->use_doorbell = true;
> ring->doorbell_index = AMDGPU_DOORBELL_MEC_RING0 + ring_id;
> sprintf(ring->name, "comp_%d.%d.%d", ring->me, ring->pipe, ring->queue);
>
> irq_type = AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP
> + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec)
> + ring->pipe;
>
> /* type-2 packets are deprecated on MEC, use type-3 instead */
> - r = amdgpu_ring_init(adev, ring, 1024,
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_COMPUTE, 1024,
> &adev->gfx.eop_irq, irq_type);
> if (r)
> return r;
>
>
> return 0;
> }
>
> static int gfx_v8_0_sw_init(void *handle)
> {
> @@ -2219,22 +2219,22 @@ static int gfx_v8_0_sw_init(void *handle)
> for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
> ring = &adev->gfx.gfx_ring[i];
> ring->ring_obj = NULL;
> sprintf(ring->name, "gfx");
> /* no gfx doorbells on iceland */
> if (adev->asic_type != CHIP_TOPAZ) {
> ring->use_doorbell = true;
> ring->doorbell_index = AMDGPU_DOORBELL_GFX_RING0;
> }
>
> - r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq,
> - AMDGPU_CP_IRQ_GFX_EOP);
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_GFX, 1024,
> + &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP);
> if (r)
> return r;
> }
>
> /* set up the compute queues - allocate horizontally across pipes */
> ring_id = 0;
> for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; ++i) {
> for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) {
> for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) {
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> index 896be64..62c3461 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> @@ -941,21 +941,21 @@ static int sdma_v2_4_sw_init(void *handle)
> if (r) {
> DRM_ERROR("Failed to load sdma firmware!\n");
> return r;
> }
>
> for (i = 0; i < adev->sdma.num_instances; i++) {
> ring = &adev->sdma.instance[i].ring;
> ring->ring_obj = NULL;
> ring->use_doorbell = false;
> sprintf(ring->name, "sdma%d", i);
> - r = amdgpu_ring_init(adev, ring, 1024,
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_DMA, 1024,
> &adev->sdma.trap_irq,
> (i == 0) ?
> AMDGPU_SDMA_IRQ_TRAP0 :
> AMDGPU_SDMA_IRQ_TRAP1);
> if (r)
> return r;
> }
>
> return r;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> index 31375bd..7467a1e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> @@ -1159,21 +1159,21 @@ static int sdma_v3_0_sw_init(void *handle)
> }
>
> for (i = 0; i < adev->sdma.num_instances; i++) {
> ring = &adev->sdma.instance[i].ring;
> ring->ring_obj = NULL;
> ring->use_doorbell = true;
> ring->doorbell_index = (i == 0) ?
> AMDGPU_DOORBELL_sDMA_ENGINE0 : AMDGPU_DOORBELL_sDMA_ENGINE1;
>
> sprintf(ring->name, "sdma%d", i);
> - r = amdgpu_ring_init(adev, ring, 1024,
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_DMA, 1024,
> &adev->sdma.trap_irq,
> (i == 0) ?
> AMDGPU_SDMA_IRQ_TRAP0 :
> AMDGPU_SDMA_IRQ_TRAP1);
> if (r)
> return r;
> }
>
> return r;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/si_dma.c b/drivers/gpu/drm/amd/amdgpu/si_dma.c
> index 3372a07..64d22d2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/si_dma.c
> +++ b/drivers/gpu/drm/amd/amdgpu/si_dma.c
> @@ -523,21 +523,21 @@ static int si_dma_sw_init(void *handle)
> /* DMA1 trap event */
> r = amdgpu_irq_add_id(adev, 244, &adev->sdma.trap_irq_1);
> if (r)
> return r;
>
> for (i = 0; i < adev->sdma.num_instances; i++) {
> ring = &adev->sdma.instance[i].ring;
> ring->ring_obj = NULL;
> ring->use_doorbell = false;
> sprintf(ring->name, "sdma%d", i);
> - r = amdgpu_ring_init(adev, ring, 1024,
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_DMA, 1024,
> &adev->sdma.trap_irq,
> (i == 0) ?
> AMDGPU_SDMA_IRQ_TRAP0 :
> AMDGPU_SDMA_IRQ_TRAP1);
> if (r)
> return r;
> }
>
> return r;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
> index b34cefc..9df30ea 100644
> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
> @@ -114,21 +114,22 @@ static int uvd_v4_2_sw_init(void *handle)
> r = amdgpu_uvd_sw_init(adev);
> if (r)
> return r;
>
> r = amdgpu_uvd_resume(adev);
> if (r)
> return r;
>
> ring = &adev->uvd.ring;
> sprintf(ring->name, "uvd");
> - r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.irq, 0);
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_UVD, 512,
> + &adev->uvd.irq, 0);
>
> return r;
> }
>
> static int uvd_v4_2_sw_fini(void *handle)
> {
> int r;
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> r = amdgpu_uvd_suspend(adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
> index ad8c02e..9b4017f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
> @@ -110,21 +110,22 @@ static int uvd_v5_0_sw_init(void *handle)
> r = amdgpu_uvd_sw_init(adev);
> if (r)
> return r;
>
> r = amdgpu_uvd_resume(adev);
> if (r)
> return r;
>
> ring = &adev->uvd.ring;
> sprintf(ring->name, "uvd");
> - r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.irq, 0);
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_UVD, 512,
> + &adev->uvd.irq, 0);
>
> return r;
> }
>
> static int uvd_v5_0_sw_fini(void *handle)
> {
> int r;
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> r = amdgpu_uvd_suspend(adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
> index 18a6de4..de9cce1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
> @@ -113,21 +113,22 @@ static int uvd_v6_0_sw_init(void *handle)
> r = amdgpu_uvd_sw_init(adev);
> if (r)
> return r;
>
> r = amdgpu_uvd_resume(adev);
> if (r)
> return r;
>
> ring = &adev->uvd.ring;
> sprintf(ring->name, "uvd");
> - r = amdgpu_ring_init(adev, ring, 512, &adev->uvd.irq, 0);
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_UVD, 512,
> + &adev->uvd.irq, 0);
>
> return r;
> }
>
> static int uvd_v6_0_sw_fini(void *handle)
> {
> int r;
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> r = amdgpu_uvd_suspend(adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
> index 9ea9934..38cd52b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
> @@ -438,21 +438,21 @@ static int vce_v2_0_sw_init(void *handle)
> if (r)
> return r;
>
> r = amdgpu_vce_resume(adev);
> if (r)
> return r;
>
> for (i = 0; i < adev->vce.num_rings; i++) {
> ring = &adev->vce.ring[i];
> sprintf(ring->name, "vce%d", i);
> - r = amdgpu_ring_init(adev, ring, 512,
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_VCE, 512,
> &adev->vce.irq, 0);
> if (r)
> return r;
> }
>
> return r;
> }
>
> static int vce_v2_0_sw_fini(void *handle)
> {
> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> index 93ec881..09d04e1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> @@ -396,21 +396,22 @@ static int vce_v3_0_sw_init(void *handle)
> if (adev->vce.fw_version < FW_52_8_3)
> adev->vce.num_rings = 2;
>
> r = amdgpu_vce_resume(adev);
> if (r)
> return r;
>
> for (i = 0; i < adev->vce.num_rings; i++) {
> ring = &adev->vce.ring[i];
> sprintf(ring->name, "vce%d", i);
> - r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0);
> + r = amdgpu_ring_init(adev, ring, AMDGPU_HW_IP_VCE, 512,
> + &adev->vce.irq, 0);
> if (r)
> return r;
> }
>
> return r;
> }
>
> static int vce_v3_0_sw_fini(void *handle)
> {
> int r;
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index 5797283..b5ae774 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -376,21 +376,22 @@ struct drm_amdgpu_gem_va {
> __u64 offset_in_bo;
> /** Specify mapping size. Must be correctly aligned. */
> __u64 map_size;
> };
>
> #define AMDGPU_HW_IP_GFX 0
> #define AMDGPU_HW_IP_COMPUTE 1
> #define AMDGPU_HW_IP_DMA 2
> #define AMDGPU_HW_IP_UVD 3
> #define AMDGPU_HW_IP_VCE 4
> -#define AMDGPU_HW_IP_NUM 5
> +#define AMDGPU_HW_IP_KIQ 5
> +#define AMDGPU_HW_IP_NUM 6
There's no reason to expose KIQ to userspace.
>
> #define AMDGPU_HW_IP_INSTANCE_MAX_COUNT 1
>
> #define AMDGPU_CHUNK_ID_IB 0x01
> #define AMDGPU_CHUNK_ID_FENCE 0x02
> #define AMDGPU_CHUNK_ID_DEPENDENCIES 0x03
>
> struct drm_amdgpu_cs_chunk {
> __u32 chunk_id;
> __u32 length_dw;
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
