[AMD Official Use Only - General]
> -----Original Message-----
> From: Zhu, James <James.Zhu@xxxxxxx>
> Sent: Friday, November 3, 2023 9:11 AM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Kuehling, Felix <Felix.Kuehling@xxxxxxx>; Greathouse, Joseph
> <Joseph.Greathouse@xxxxxxx>; Yat Sin, David <David.YatSin@xxxxxxx>; Zhu,
> James <James.Zhu@xxxxxxx>
> Subject: [PATCH 13/24] drm/amdgpu: add sq host trap status check
>
> Before fire a new host trap, check the host trap status.
>
> Signed-off-by: James Zhu <James.Zhu@xxxxxxx>
> ---
> .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 35
> +++++++++++++++++++
> .../amd/include/asic_reg/gc/gc_9_0_offset.h | 2 ++
> .../amd/include/asic_reg/gc/gc_9_0_sh_mask.h | 5 +++
> 3 files changed, 42 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
> index 740d8a0c9252..2c5bbbb7e34e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
> @@ -1146,6 +1146,35 @@ void
> kgd_gfx_v9_program_trap_handler_settings(struct amdgpu_device *adev,
> kgd_gfx_v9_unlock_srbm(adev, inst);
> }
>
> +static uint32_t kgd_aldebaran_get_hosttrap_status(struct amdgpu_device
> +*adev) {
> + uint32_t sq_hosttrap_status;
Initialize to 0. Some static code analyzers may raise warning because it is possible to return an uninitialized value.
Regards,
David
> + int i, j;
> +
> + mutex_lock(&adev->grbm_idx_mutex);
> + for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
> + for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
> + amdgpu_gfx_select_se_sh(adev, i, j, 0xffffffff, 0);
> + sq_hosttrap_status = RREG32_SOC15(GC, 0,
> mmSQ_HOSTTRAP_STATUS);
> +
> + if (sq_hosttrap_status &
> SQ_HOSTTRAP_STATUS__HTPENDING_OVERRIDE_MASK) {
> + WREG32_SOC15(GC, 0,
> mmSQ_HOSTTRAP_STATUS,
> +
> SQ_HOSTTRAP_STATUS__HTPENDING_OVERRIDE_MASK);
> + sq_hosttrap_status = 0x0;
> + continue;
> + }
> + if (sq_hosttrap_status)
> + goto out;
> + }
> + }
> +
> +out:
> + amdgpu_gfx_select_se_sh(adev, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
> 0);
> + mutex_unlock(&adev->grbm_idx_mutex);
> +
> + return sq_hosttrap_status;
> +}
> +
> uint32_t kgd_gfx_v9_trigger_pc_sample_trap(struct amdgpu_device *adev,
> uint32_t vmid,
> uint32_t max_wave_slot,
> @@ -1156,6 +1185,12 @@ uint32_t
> kgd_gfx_v9_trigger_pc_sample_trap(struct amdgpu_device *adev, {
> if (method == KFD_IOCTL_PCS_METHOD_HOSTTRAP) {
> uint32_t value = 0;
> + uint32_t sq_hosttrap_status;
> +
> + sq_hosttrap_status = kgd_aldebaran_get_hosttrap_status(adev);
> + /* skip when last host trap request is still pending to complete
> */
> + if (sq_hosttrap_status)
> + return 0;
>
> value = REG_SET_FIELD(value, SQ_CMD, CMD,
> SQ_IND_CMD_CMD_TRAP);
> value = REG_SET_FIELD(value, SQ_CMD, MODE,
> SQ_IND_CMD_MODE_SINGLE); diff --git
> a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
> b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
> index 12d451e5475b..5b17d9066452 100644
> --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
> +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
> @@ -462,6 +462,8 @@
> #define mmSQ_IND_DATA_BASE_IDX
> 0
> #define mmSQ_CMD 0x037b
> #define mmSQ_CMD_BASE_IDX 0
> +#define mmSQ_HOSTTRAP_STATUS
> 0x0376
> +#define mmSQ_HOSTTRAP_STATUS_BASE_IDX
> 0
> #define mmSQ_TIME_HI 0x037c
> #define mmSQ_TIME_HI_BASE_IDX 0
> #define mmSQ_TIME_LO
> 0x037d
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
> b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
> index efc16ddf274a..3dfe4ab31421 100644
> --- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
> +++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
> @@ -2616,6 +2616,11 @@
> //SQ_CMD_TIMESTAMP
> #define SQ_CMD_TIMESTAMP__TIMESTAMP__SHIFT
> 0x0
> #define SQ_CMD_TIMESTAMP__TIMESTAMP_MASK
> 0x000000FFL
> +//SQ_HOSTTRAP_STATUS
> +#define SQ_HOSTTRAP_STATUS__HTPENDINGCOUNT__SHIFT
> 0x0
> +#define SQ_HOSTTRAP_STATUS__HTPENDING_OVERRIDE__SHIFT
> 0x8
> +#define SQ_HOSTTRAP_STATUS__HTPENDINGCOUNT_MASK
> 0x000000FFL
> +#define SQ_HOSTTRAP_STATUS__HTPENDING_OVERRIDE_MASK
> 0x00000100L
> //SQ_IND_INDEX
> #define SQ_IND_INDEX__WAVE_ID__SHIFT
> 0x0
> #define SQ_IND_INDEX__SIMD_ID__SHIFT
> 0x4
> --
> 2.25.1
