Am 16.06.2017 um 18:28 schrieb Jerome Glisse: > On Thu, Mar 09, 2017 at 10:57:27AM +0100, Christian König wrote: >> Am 09.03.2017 um 04:44 schrieb Alex Deucher: >>> From: Ken Wang <Qingqing.Wang at amd.com> >>> >>> Newer asics use 64 bit wptrs >> We need a better patch description. Newer asics doesn't use 64bit wptrs, but >> rather need them! >> >> E.g. if the wptr is now smaller than the rptr that doesn't indicate a wrap >> around any more. > What does it means ? Doesn't make sense, you are allocating 1TB command > buffer and know you will never run out of space ? ;) When the pointers are actually evaluated to a memory address the higher bits are masked out. So your still have a ring buffer of size N, but the pointers into the ring buffer are always 64bit. Since they are 64bit the assumption is that they never overflow and so the rptr is NEVER bigger than the wptr any more. That solves a few the problems, e.g. when rptr=wptr you don't know if the ring buffer is completely full or completely empty (classical problem of a ring buffer). Additional to that if you want to know how many entries are used in the ring buffer you just need to calculate wptr - rptr and are done, no wrap around handling any more. Cheers, Christian. > > Either we are talking about a ring buffer and then wptr < rptr means wrap > around or we are talking about something new that is not a ring buffer. > > 64 bits or 32 bits doesn't matter from ring buffer point of view. So i > am puzzle about what this new thing is. Anywhere i can read about this > new command buffer thingy ? Because from where i stand it looks like it > would be better to be something else than a ring buffer if there is no > wrap around. > > Cheers, > Jérôme
