> -----Original Message----- > From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf > Of Rex Zhu > Sent: Friday, June 09, 2017 4:19 AM > To: amd-gfx at lists.freedesktop.org > Cc: Zhu, Rex > Subject: [PATCH 1/2] drm/amd/powerplay: implement gpu voltage display > for smu7_hwmgr. > > Change-Id: I4fca04d24e6b11ab0b036451da61d58114534e6c > Signed-off-by: Rex Zhu <Rex.Zhu at amd.com> This patch is: Reviewed-by: Alex Deucher <alexander.deucher at amd.com> > --- > drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 24 > ++++++++++++++++++ > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 31 > +++++++++++++++++++++++ > drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 7 +++++ > drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 2 ++ > 4 files changed, 64 insertions(+) > > diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > index f73e80c..bd50e64 100644 > --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c > @@ -1049,6 +1049,29 @@ static int pp_dpm_get_power_profile_state(void > *handle, > return 0; > } > > +static int pp_dpm_get_gpu_voltage(void *handle, > + enum PP_VOL_TYPE type, uint32_t *vol) > +{ > + struct pp_hwmgr *hwmgr; > + struct pp_instance *pp_handle = (struct pp_instance *)handle; > + > + if (!vol || pp_check(pp_handle)) > + return -EINVAL; > + > + hwmgr = pp_handle->hwmgr; > + > + if (hwmgr->hwmgr_func->get_gpu_voltage == NULL) { > + pr_info("%s was not implemented.\n", __func__); > + return 0; > + } > + > + mutex_lock(&pp_handle->pp_lock); > + hwmgr->hwmgr_func->get_gpu_voltage(hwmgr, type, vol); > + mutex_unlock(&pp_handle->pp_lock); > + > + return 0; > +} > + > static int pp_dpm_set_power_profile_state(void *handle, > struct amd_pp_profile *request) > { > @@ -1160,6 +1183,7 @@ static int pp_dpm_switch_power_profile(void > *handle, > .get_power_profile_state = pp_dpm_get_power_profile_state, > .set_power_profile_state = pp_dpm_set_power_profile_state, > .switch_power_profile = pp_dpm_switch_power_profile, > + .get_gpu_voltage = pp_dpm_get_gpu_voltage, > }; > > int amd_powerplay_create(struct amd_pp_init *pp_init, > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > index 102eb6d..e7ecbd1 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > @@ -3312,6 +3312,36 @@ static int smu7_get_pp_table_entry(struct > pp_hwmgr *hwmgr, > return 0; > } > > +static int smu7_get_gpu_voltage(struct pp_hwmgr *hwmgr, > + enum PP_VOL_TYPE type, uint32_t *vol) > +{ > + PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr- > >smumgr, > + PPSMC_MSG_PmStatusLogStart), > + "Failed to start pm status log!", > + return -EINVAL); > + > + msleep_interruptible(20); > + > + PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr- > >smumgr, > + PPSMC_MSG_PmStatusLogSample), > + "Failed to sample pm status log!", > + return -EINVAL); > + > + if (type == PP_VDDC) > + *vol = cgs_read_ind_register(hwmgr->device, > + CGS_IND_REG__SMC, > + ixSMU_PM_STATUS_42); > + else if (type == PP_VDDCI) > + *vol = cgs_read_ind_register(hwmgr->device, > + CGS_IND_REG__SMC, > + ixSMU_PM_STATUS_51); > + else > + *vol = 0; > + > + return 0; > +} > + > + > static int smu7_get_gpu_power(struct pp_hwmgr *hwmgr, > struct pp_gpu_power *query) > { > @@ -4697,6 +4727,7 @@ static int smu7_avfs_control(struct pp_hwmgr > *hwmgr, bool enable) > .set_power_profile_state = smu7_set_power_profile_state, > .avfs_control = smu7_avfs_control, > .disable_smc_firmware_ctf = smu7_thermal_disable_alert, > + .get_gpu_voltage = smu7_get_gpu_voltage, > }; > > uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock, > diff --git a/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h > b/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h > index 07e9c0b..66b34f6 100644 > --- a/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h > +++ b/drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h > @@ -306,6 +306,11 @@ struct pp_states_info { > uint32_t states[16]; > }; > > +enum PP_VOL_TYPE { > + PP_VDDC, > + PP_VDDCI, > +}; > + > struct pp_gpu_power { > uint32_t vddc_power; > uint32_t vddci_power; > @@ -392,6 +397,8 @@ struct amd_powerplay_funcs { > struct amd_pp_profile *request); > int (*switch_power_profile)(void *handle, > enum amd_pp_profile_type type); > + int (*get_gpu_voltage)(void *handle, > + enum PP_VOL_TYPE type, u32 *vol); > }; > > struct amd_powerplay { > diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h > b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h > index 47e57bd..f844c33 100644 > --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h > +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h > @@ -376,6 +376,8 @@ struct pp_hwmgr_func { > struct amd_pp_profile *request); > int (*avfs_control)(struct pp_hwmgr *hwmgr, bool enable); > int (*disable_smc_firmware_ctf)(struct pp_hwmgr *hwmgr); > + int (*get_gpu_voltage)(struct pp_hwmgr *hwmgr, > + enum PP_VOL_TYPE type, u32 *vol); > }; > > struct pp_table_func { > -- > 1.9.1 > > _______________________________________________ > amd-gfx mailing list > amd-gfx at lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
