[PATCH] drm/amdgpu: read reg in each iterate of psp_wait_for loop

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+ stable at vger.kernel.org

On 07/17/2017 03:57 PM, Huang Rui wrote:
> On Mon, Jul 17, 2017 at 03:52:10PM +0800, Huang Rui wrote:
>> On Fri, Jul 14, 2017 at 06:20:17PM +0800, Junwei Zhang wrote:
>>> Signed-off-by: Junwei Zhang <Jerry.Zhang at amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +--
>>>   1 file changed, 1 insertion(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
>>> index ba743d4..71ce3ee 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
>>> @@ -95,9 +95,8 @@ int psp_wait_for(struct psp_context *psp, uint32_t reg_index,
>>>   	int i;
>>>   	struct amdgpu_device *adev = psp->adev;
>>>
>>> -	val = RREG32(reg_index);
>>> -
>>>   	for (i = 0; i < adev->usec_timeout; i++) {
>>> +		val = RREG32(reg_index);
>>>   		if (check_changed) {
>>>   			if (val != reg_val)
>>>   				return 0;
>>
>> Nice catch. I remembered Ken also mentioned it before. This should fix the
>> issue I encountered before during bring-up. Can you open this handshake in
>> psp_v3_1_bootloader_load_sos and double check if this handshake is workable
>> with this fix. If yes, please add it back.

Yes, it could fix this.
Later I will enable it.

Jerry

>>
>> #if 0
>>          ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81),
>>                             RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_81),
>>                             0, true);
>> #endif
>>
>> Acked-by: Huang Rui <ray.huang at amd.com>
>
> BTW: please add Cc: <stable at vger.kernel.org> in your patch, it need be
> backported to stable tree.
>
> Thanks,
> Rui
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> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>


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