> -----Original Message----- > From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf > Of Junwei Zhang > Sent: Friday, July 14, 2017 6:42 AM > To: amd-gfx at lists.freedesktop.org > Cc: Zhang, Jerry > Subject: [PATCH 3/4] drm/amdgpu: add ring_create function for psp v10 > > Signed-off-by: Junwei Zhang <Jerry.Zhang at amd.com> Reviewed-by: Alex Deucher <alexander.deucher at amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 + > drivers/gpu/drm/amd/amdgpu/psp_v10_0.c | 31 > +++++++++++++++++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/psp_v10_0.h | 2 ++ > 3 files changed, 34 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c > index dc95633..8f4eafc 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c > @@ -66,6 +66,7 @@ static int psp_sw_init(void *handle) > psp->init_microcode = psp_v10_0_init_microcode; > psp->prep_cmd_buf = psp_v10_0_prep_cmd_buf; > psp->ring_init = psp_v10_0_ring_init; > + psp->ring_create = psp_v10_0_ring_create; > psp->cmd_submit = psp_v10_0_cmd_submit; > psp->compare_sram_data = > psp_v10_0_compare_sram_data; > break; > diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c > b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c > index 7513f9c..fb29cd4 100644 > --- a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c > @@ -179,6 +179,37 @@ int psp_v10_0_ring_init(struct psp_context *psp, > enum psp_ring_type ring_type) > return 0; > } > > +int psp_v10_0_ring_create(struct psp_context *psp, enum psp_ring_type > ring_type) > +{ > + int ret = 0; > + unsigned int psp_ring_reg = 0; > + struct psp_ring *ring = &psp->km_ring; > + struct amdgpu_device *adev = psp->adev; > + > + /* Write low address of the ring to C2PMSG_69 */ > + psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr); > + WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, > psp_ring_reg); > + /* Write high address of the ring to C2PMSG_70 */ > + psp_ring_reg = upper_32_bits(ring->ring_mem_mc_addr); > + WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, > psp_ring_reg); > + /* Write size of ring to C2PMSG_71 */ > + psp_ring_reg = ring->ring_size; > + WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, > psp_ring_reg); > + /* Write the ring initialization command to C2PMSG_64 */ > + psp_ring_reg = ring_type; > + psp_ring_reg = psp_ring_reg << 16; > + WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, > psp_ring_reg); > + > + /* There might be handshake issue with hardware which needs delay > */ > + mdelay(20); > + > + /* Wait for response flag (bit 31) in C2PMSG_64 */ > + ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, > mmMP0_SMN_C2PMSG_64), > + 0x80000000, 0x8000FFFF, false); > + > + return ret; > +} > + > int psp_v10_0_cmd_submit(struct psp_context *psp, > struct amdgpu_firmware_info *ucode, > uint64_t cmd_buf_mc_addr, uint64_t fence_mc_addr, > diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.h > b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.h > index 2f5a314e..7e9a8cd 100644 > --- a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.h > +++ b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.h > @@ -32,6 +32,8 @@ extern int psp_v10_0_prep_cmd_buf(struct > amdgpu_firmware_info *ucode, > struct psp_gfx_cmd_resp *cmd); > extern int psp_v10_0_ring_init(struct psp_context *psp, > enum psp_ring_type ring_type); > +extern int psp_v10_0_ring_create(struct psp_context *psp, > + enum psp_ring_type ring_type); > extern int psp_v10_0_cmd_submit(struct psp_context *psp, > struct amdgpu_firmware_info *ucode, > uint64_t cmd_buf_mc_addr, uint64_t > fence_mc_addr, > -- > 1.9.1 > > _______________________________________________ > amd-gfx mailing list > amd-gfx at lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
