[PART1 PATCH v2 2/8] drm/amdgpu: add parse clock gating state

[Alexander.Deucher@xxxxxxx (Deucher, Alexander)]

> -----Original Message-----
> From: Huang Rui [mailto:ray.huang at amd.com]
> Sent: Friday, January 06, 2017 2:46 AM
> To: Deucher, Alexander; amd-gfx at lists.freedesktop.org
> Cc: Zhu, Rex; Mao, David; Fu, Ping; Zhang, Hawking; Kuehling, Felix; Huang,
> Ray; William Lewis
> Subject: [PART1 PATCH v2 2/8] drm/amdgpu: add parse clock gating state
> 
> Signed-off-by: Huang Rui <ray.huang at amd.com>
> Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> Cc: William Lewis <minutemaidpark at hotmail.com>
> Cc: Felix Kuehling <felix.kuehling at amd.com>
> ---
> 
> William,
> 
> "Medium Grain Clock Gating" is referred from HW spec. So it's better
> to align with it. I updated function name from clockgating_state to
> get_clockgating_state.
> 
> Thanks,
> Rui
> 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 33
> +++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h |  6 ++++++
>  2 files changed, 39 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> index 1203e9a..906ed4e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> @@ -34,6 +34,28 @@
> 
>  static int amdgpu_debugfs_pm_init(struct amdgpu_device *adev);
> 
> +static const struct cg_flag_name clocks[] = {
> +	{AMD_CG_SUPPORT_GFX_MGCG, "Medium Grain Clock Gating"},
> +	{AMD_CG_SUPPORT_GFX_MGLS, "Medium Grain memory Light
> Sleep"},
> +	{AMD_CG_SUPPORT_GFX_CGCG, "Coarse Grain Clock Gating"},
> +	{AMD_CG_SUPPORT_GFX_CGLS, "Coarse Grain memory Light
> Sleep"},
> +	{AMD_CG_SUPPORT_GFX_CGTS, "Coarse Grain Tree Shader Light
> Sleep"},
> +	{AMD_CG_SUPPORT_GFX_CGTS_LS, "Coarse Grain Tree Shader Light
> Sleep"},

Minor nit, maybe prefix these with GFX.

> +	{AMD_CG_SUPPORT_GFX_CP_LS, "Command Processor Light
> Sleep"},
> +	{AMD_CG_SUPPORT_GFX_RLC_LS, "Run List Controller Light Sleep"},
> +	{AMD_CG_SUPPORT_MC_LS, "Memory Controller Light Sleep"},
> +	{AMD_CG_SUPPORT_MC_MGCG, "Memory Controller Medium
> Grain Clock Gating"},
> +	{AMD_CG_SUPPORT_SDMA_LS, "System Direct Memory Access
> Light Sleep"},
> +	{AMD_CG_SUPPORT_SDMA_MGCG, "System Direct Memory Access
> Medium Grain Clock Gating"},
> +	{AMD_CG_SUPPORT_BIF_LS, "Bus Interface Light Sleep"},
> +	{AMD_CG_SUPPORT_UVD_MGCG, "Universal Video Decoder
> Medium Grain Clock Gating"},

Unified -> Universal

> +	{AMD_CG_SUPPORT_VCE_MGCG, "Video Coding Engine Medium
> Grain Clock Gating"},

Coding -> Compression

> +	{AMD_CG_SUPPORT_HDP_LS, "Host Data Path Light Sleep"},
> +	{AMD_CG_SUPPORT_HDP_MGCG, "Host Data Path Medium Grain
> Clock Gating"},
> +	{AMD_CG_SUPPORT_ROM_MGCG, "Rom Medium Grain Clock
> Gating"},
> +	{0, NULL},
> +};
> +
>  void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev)
>  {
>  	if (adev->pp_enabled)
> @@ -1536,6 +1558,15 @@ static int amdgpu_debugfs_pm_info_pp(struct
> seq_file *m, struct amdgpu_device *a
>  	return 0;
>  }
> 
> +static void amdgpu_parse_cg_state(struct seq_file *m, u32 flags)
> +{
> +	int i;
> +
> +	for (i = 0; clocks[i].flag; i++)
> +		seq_printf(m, "\t%s: %s\n", clocks[i].name,
> +			   (flags & clocks[i].flag) ? "On" : "Off");
> +}
> +
>  static int amdgpu_debugfs_pm_info(struct seq_file *m, void *data)
>  {
>  	struct drm_info_node *node = (struct drm_info_node *) m-
> >private;
> @@ -1546,6 +1577,8 @@ static int amdgpu_debugfs_pm_info(struct seq_file
> *m, void *data)
> 
>  	amdgpu_get_clockgating_state(adev, &flags);
>  	seq_printf(m, "Clock Gating Flags Mask: 0x%x\n", flags);
> +	amdgpu_parse_cg_state(m, flags);
> +	seq_printf(m, "\n");
> 
>  	if (!adev->pm.dpm_enabled) {
>  		seq_printf(m, "dpm not enabled\n");
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h
> index 5fd7734..c19c4d1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.h
> @@ -24,6 +24,12 @@
>  #ifndef __AMDGPU_PM_H__
>  #define __AMDGPU_PM_H__
> 
> +struct cg_flag_name
> +{
> +	u32 flag;
> +	const char *name;
> +};
> +
>  int amdgpu_pm_sysfs_init(struct amdgpu_device *adev);
>  void amdgpu_pm_sysfs_fini(struct amdgpu_device *adev);
>  void amdgpu_pm_print_power_states(struct amdgpu_device *adev);
> --
> 2.7.4