This could be done with much less code duplication:
static const struct {
u32 flag;
const char *name;
} clocks[] = {
{AMD_CG_SUPPORT_GFX_MGCG, "Medium Grain Clock Gating"},
{AMD_CG_SUPPORT_GFX_MGLS, "Medium Grain memory Light Sleep"},
...
{0, NULL}
};
for (i = 0; clocks[i].flag; i++)
seq_printf(m, "\t%s: %s\n",
clocks[i].name,
(flags & clocks[i].flag) ? "On" : "Off");
Regards,
Felix
On 17-01-05 08:49 AM, Huang Rui wrote:
> Signed-off-by: Huang Rui <ray.huang at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 95 ++++++++++++++++++++++++++++++++++
> 1 file changed, 95 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> index 7aa561d..431bae4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
> @@ -1536,6 +1536,99 @@ static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *a
> return 0;
> }
>
> +static void amdgpu_parse_cg_state(struct seq_file *m, u32 flags)
> +{
> + if (flags & AMD_CG_SUPPORT_GFX_MGCG)
> + seq_printf(m, "\tMedium Grain Clock Gating: On\n");
> + else
> + seq_printf(m, "\tMedium Grain Clock Gating: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_GFX_MGLS)
> + seq_printf(m, "\tMedium Grain memory Light Sleep: On\n");
> + else
> + seq_printf(m, "\tMedium Grain memory Light Sleep: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_GFX_CGCG)
> + seq_printf(m, "\tCoarse Grain Clock Gating: On\n");
> + else
> + seq_printf(m, "\tCoarse Grain Clock Gating: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_GFX_CGLS)
> + seq_printf(m, "\tCoarse Grain memory Light Sleep: On\n");
> + else
> + seq_printf(m, "\tCoarse Grain memory Light Sleep: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_GFX_CGTS)
> + seq_printf(m, "\tCoarse Grain Tree Shader: On\n");
> + else
> + seq_printf(m, "\tCoarse Grain Tree Shader: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_GFX_CGTS_LS)
> + seq_printf(m, "\tCoarse Grain Tree Shader Light Sleep: On\n");
> + else
> + seq_printf(m, "\tCoarse Grain Tree Shader Light Sleep: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_GFX_CP_LS)
> + seq_printf(m, "\tCommand Processor Light Sleep: On\n");
> + else
> + seq_printf(m, "\tCommand Processor Light Sleep: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_GFX_RLC_LS)
> + seq_printf(m, "\tRun List Controller Light Sleep: On\n");
> + else
> + seq_printf(m, "\tRun List Controller Light Sleep: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_MC_LS)
> + seq_printf(m, "\tMemory Controller Light Sleep: On\n");
> + else
> + seq_printf(m, "\tMemory Controller Light Sleep: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_MC_MGCG)
> + seq_printf(m, "\tMemory Controller Medium Grain Clock Gating: On\n");
> + else
> + seq_printf(m, "\tMemory Controller Medium Grain Clock Gating: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_SDMA_LS)
> + seq_printf(m, "\tSystem Direct Memory Access Light Sleep: On\n");
> + else
> + seq_printf(m, "\tSystem Direct Memory Access Light Sleep: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_SDMA_MGCG)
> + seq_printf(m, "\tSystem Direct Memory Access Medium Grain Clock Gating: On\n");
> + else
> + seq_printf(m, "\tSystem Direct Memory Access Medium Grain Clock Gating: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_BIF_LS)
> + seq_printf(m, "\tBus Interface Light Sleep: On\n");
> + else
> + seq_printf(m, "\tBus Interface Light Sleep: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_UVD_MGCG)
> + seq_printf(m, "\tUniversal Video Decoder Medium Grain Clock Gating: On\n");
> + else
> + seq_printf(m, "\tUniversal Video Decoder Medium Grain Clock Gating: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_VCE_MGCG)
> + seq_printf(m, "\tVideo Coding Engine Medium Grain Clock Gating: On\n");
> + else
> + seq_printf(m, "\tVideo Coding Engine Medium Grain Clock Gating: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_HDP_LS)
> + seq_printf(m, "\tHost Data Path Light Sleep: On\n");
> + else
> + seq_printf(m, "\tHost Data Path Light Sleep: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_HDP_MGCG)
> + seq_printf(m, "\tHost Data Path Medium Grain Clock Gating: On\n");
> + else
> + seq_printf(m, "\tHost Data Path Medium Grain Clock Gating: Off\n");
> +
> + if (flags & AMD_CG_SUPPORT_ROM_MGCG)
> + seq_printf(m, "\tRom Medium Grain Clock Gating: On\n");
> + else
> + seq_printf(m, "\tRom Medium Grain Clock Gating: Off\n");
> +}
> +
> static int amdgpu_debugfs_pm_info(struct seq_file *m, void *data)
> {
> struct drm_info_node *node = (struct drm_info_node *) m->private;
> @@ -1546,6 +1639,8 @@ static int amdgpu_debugfs_pm_info(struct seq_file *m, void *data)
>
> amdgpu_clockgating_state(adev, &flags);
> seq_printf(m, "Clock Gating Flags Mask: 0x%x\n", flags);
> + amdgpu_parse_cg_state(m, flags);
> + seq_printf(m, "\n");
>
> if (!adev->pm.dpm_enabled) {
> seq_printf(m, "dpm not enabled\n");
