Am 08.02.2017 um 13:55 schrieb Nicolai Hähnle:
> On 08.02.2017 13:44, Nicolai Hähnle wrote:
>> On 08.02.2017 13:39, Christian König wrote:
>>> Am 08.02.2017 um 13:34 schrieb Nicolai Hähnle:
>>>> From: Nicolai Hähnle <nicolai.haehnle at amd.com>
>>>>
>>>> This variant allows the caller full control over flags and size, and
>>>> allows passing a NULL bo (for PRT support).
>>>>
>>>> Cc: Christian König <christian.koenig at amd.com>
>>>> Cc: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
>>>> Cc: Jerry Zhang <Jerry.Zhang at amd.com>
>>>> Signed-off-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
>>>
>>> Reviewed-by: Christian König <christian.koenig at amd.com>.
>>>
>>> You have a perfect timing, just wanted to ask if anybody has already
>>> done the unit test or if I should tackle it?
>>
>> I actually started hacking on radeonsi support while traveling and
>> decided to push that towards a somewhat usable state, so a series for
>> Mesa is going out now :)
>>
>> A unit test in libdrm is still a good idea, but I haven't done that.
>
> FWIW, I don't plan to write such a unit test, but I did send out a
> basic piglit test as well that works for me with the Mesa series --
> minus the fact I still get GPU VM faults when I change the test to not
> commit pages.
Ok, I've hacked together a quick unit test to write a few dw to a PRT
mapping using the SDMA.
Seems to cause a VM fault as well without a message that we turned PRT
handling on.
Going to investigate, looks like another issue with the kernel patches
to me.
Regards,
Christian.
>
> Nicolai
>
>
>>
>> Cheers,
>> Nicolai
>>
>>>
>>> Regards,
>>> Christian.
>>>
>>>> ---
>>>> amdgpu/amdgpu.h | 28 ++++++++++++++++++++++++++++
>>>> amdgpu/amdgpu_bo.c | 25 ++++++++++++++++++++-----
>>>> 2 files changed, 48 insertions(+), 5 deletions(-)
>>>>
>>>> diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
>>>> index 7b26a04..6b2ded8 100644
>>>> --- a/amdgpu/amdgpu.h
>>>> +++ b/amdgpu/amdgpu.h
>>>> @@ -1186,6 +1186,34 @@ int amdgpu_bo_va_op(amdgpu_bo_handle bo,
>>>> uint32_t ops);
>>>> /**
>>>> + * VA mapping/unmapping for a buffer object or PRT region.
>>>> + *
>>>> + * This is not a simple drop-in extension for amdgpu_bo_va_op;
>>>> instead, all
>>>> + * parameters are treated "raw", i.e. size is not automatically
>>>> aligned, and
>>>> + * all flags must be specified explicitly.
>>>> + *
>>>> + * \param dev - \c [in] device handle
>>>> + * \param bo - \c [in] BO handle (may be NULL)
>>>> + * \param offset - \c [in] Start offset to map
>>>> + * \param size - \c [in] Size to map
>>>> + * \param addr - \c [in] Start virtual address.
>>>> + * \param flags - \c [in] Supported flags for mapping/unmapping
>>>> + * \param ops - \c [in] AMDGPU_VA_OP_MAP or
>>>> AMDGPU_VA_OP_UNMAP
>>>> + *
>>>> + * \return 0 on success\n
>>>> + * <0 - Negative POSIX Error code
>>>> + *
>>>> +*/
>>>> +
>>>> +int amdgpu_bo_va_op_raw(amdgpu_device_handle dev,
>>>> + amdgpu_bo_handle bo,
>>>> + uint64_t offset,
>>>> + uint64_t size,
>>>> + uint64_t addr,
>>>> + uint64_t flags,
>>>> + uint32_t ops);
>>>> +
>>>> +/**
>>>> * create semaphore
>>>> *
>>>> * \param sem - \c [out] semaphore handle
>>>> diff --git a/amdgpu/amdgpu_bo.c b/amdgpu/amdgpu_bo.c
>>>> index d30fd1e..f725bfd 100644
>>>> --- a/amdgpu/amdgpu_bo.c
>>>> +++ b/amdgpu/amdgpu_bo.c
>>>> @@ -683,6 +683,23 @@ int amdgpu_bo_va_op(amdgpu_bo_handle bo,
>>>> uint32_t ops)
>>>> {
>>>> amdgpu_device_handle dev = bo->dev;
>>>> +
>>>> + size = ALIGN(size, getpagesize());
>>>> +
>>>> + return amdgpu_bo_va_op_raw(dev, bo, offset, size, addr,
>>>> + AMDGPU_VM_PAGE_READABLE |
>>>> + AMDGPU_VM_PAGE_WRITEABLE |
>>>> + AMDGPU_VM_PAGE_EXECUTABLE, ops);
>>>> +}
>>>> +
>>>> +int amdgpu_bo_va_op_raw(amdgpu_device_handle dev,
>>>> + amdgpu_bo_handle bo,
>>>> + uint64_t offset,
>>>> + uint64_t size,
>>>> + uint64_t addr,
>>>> + uint64_t flags,
>>>> + uint32_t ops)
>>>> +{
>>>> struct drm_amdgpu_gem_va va;
>>>> int r;
>>>> @@ -690,14 +707,12 @@ int amdgpu_bo_va_op(amdgpu_bo_handle bo,
>>>> return -EINVAL;
>>>> memset(&va, 0, sizeof(va));
>>>> - va.handle = bo->handle;
>>>> + va.handle = bo ? bo->handle : 0;
>>>> va.operation = ops;
>>>> - va.flags = AMDGPU_VM_PAGE_READABLE |
>>>> - AMDGPU_VM_PAGE_WRITEABLE |
>>>> - AMDGPU_VM_PAGE_EXECUTABLE;
>>>> + va.flags = flags;
>>>> va.va_address = addr;
>>>> va.offset_in_bo = offset;
>>>> - va.map_size = ALIGN(size, getpagesize());
>>>> + va.map_size = size;
>>>> r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_VA, &va,
>>>> sizeof(va));
>>>>
>>>
>>>
>>
>
