Can the atomic ops work on the modified risers used for mining? On Dec 23, 2017 16:41, "Felix Kühling" <felix.kuehling at gmail.com> wrote: > As I understand it, it would require changes in the ROCr Runtime and in > the firmware (MEC microcode). It also changes the programming model, so > it may affect certain applications or higher level language runtimes > that rely on atomic operations. > > Regards, > Felix > > > Am 19.12.2017 um 16:04 schrieb Tom Stellard: > > Hi, > > > > How hard of a requirement is PCIe3 atomics for dGPUs with the amdkfd > > kernel driver? Is it possible to make modifications to the > runtime/kernel > > driver to drop this requirement? > > > > -Tom > > _______________________________________________ > > amd-gfx mailing list > > amd-gfx at lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/amd-gfx > > > > _______________________________________________ > amd-gfx mailing list > amd-gfx at lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx > > -------------- next part -------------- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/amd-gfx/attachments/20171223/def1ace3/attachment.html>
