答复: [PATCH 2/2] drm/amdgpu: restore uvd fence seq in uvd resume

[Jim.Qu@xxxxxxx (Qu, Jim)]

Hi Christian, 

I also checked move uvd fence memory into GTT bo as same as other IPs', but it has ib test fail on Bonaire. so the patch uses amdgpu_fence_driver_force_completion() to update fence seq as you suggestion.

Please review.

Thanks
JimQu

________________________________________
å??件人: Jim Qu <Jim.Qu at amd.com>
å??é??æ?¶é?´: 2017å¹´12æ??15æ?¥ 15:32
�件人: amd-gfx at lists.freedesktop.org
æ??é??: Qu, Jim
主�: [PATCH 2/2] drm/amdgpu: restore uvd fence seq in uvd resume

otherwise, uvd block will be never powered up in ring begin_use()
callback. uvd ring test will be fail in resume in rumtime pm.

Change-Id: Ic623e789cc682ea07af228898f9aaf22511bbe20
Signed-off-by: Jim Qu <Jim.Qu at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 89d59fd..e444847 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -346,6 +346,8 @@ int amdgpu_uvd_resume(struct amdgpu_device *adev)
                        ptr += le32_to_cpu(hdr->ucode_size_bytes);
                }
                memset_io(ptr, 0, size);
+               /* to restore uvd fence seq */
+               amdgpu_fence_driver_force_completion(&adev->uvd.ring);
        }

        return 0;
--
1.9.1