From: Hugo Hu <hugo.hu@xxxxxxx> Signed-off-by: Hugo Hu <hugo.hu at amd.com> Reviewed-by: Tony Cheng <Tony.Cheng at amd.com> Acked-by: Harry Wentland <harry.wentland at amd.com> --- drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c index 00528b214a9f..61e8c3e02d16 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c @@ -1470,6 +1470,12 @@ void decide_link_settings(struct dc_stream_state *stream, return; } + /* EDP use the link cap setting */ + if (stream->sink->sink_signal == SIGNAL_TYPE_EDP) { + *link_setting = link->verified_link_cap; + return; + } + /* search for the minimum link setting that: * 1. is supported according to the link training result * 2. could support the b/w requested by the timing -- 2.14.1