[PATCH 1/2] drm/amdgpu:implement invalid tlbs with kiq

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Am 13.12.2017 um 04:42 schrieb Monk Liu:
> Implement gart flush gpu tlbs with INVALIDATE_TLBS
> package on gfx9/gmc9
>
> Change-Id: I851fb93db17e04d19959768c01ba6c677cbb777c
> Signed-off-by: Monk Liu <Monk.Liu at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h      | 1 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 +
>   drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c    | 7 +++++++
>   drivers/gpu/drm/amd/amdgpu/soc15d.h      | 6 +++++-
>   4 files changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 0cb2235..b3292cb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1885,6 +1885,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
>   #define amdgpu_ring_emit_cntxcntl(r, d) (r)->funcs->emit_cntxcntl((r), (d))
>   #define amdgpu_ring_emit_rreg(r, d) (r)->funcs->emit_rreg((r), (d))
>   #define amdgpu_ring_emit_wreg(r, d, v) (r)->funcs->emit_wreg((r), (d), (v))
> +#define amdgpu_ring_emit_invalidate_tlbs(r) (r)->funcs->emit_invalidate_tlbs((r))
>   #define amdgpu_ring_emit_tmz(r, b) (r)->funcs->emit_tmz((r), (b))
>   #define amdgpu_ring_pad_ib(r, ib) ((r)->funcs->pad_ib((r), (ib)))
>   #define amdgpu_ring_init_cond_exec(r) (r)->funcs->init_cond_exec((r))
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> index 010f690..6ad314e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> @@ -152,6 +152,7 @@ struct amdgpu_ring_funcs {
>   	void (*emit_rreg)(struct amdgpu_ring *ring, uint32_t reg);
>   	void (*emit_wreg)(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
>   	void (*emit_tmz)(struct amdgpu_ring *ring, bool start);
> +	void (*emit_invalidate_tlbs)(struct amdgpu_ring *ring);

At some point we should probably superset amdgpu_ring_funcs with and 
amdgpu_kiq_funcs structure.

But that can come in a later patch as well.

>   	/* priority functions */
>   	void (*set_priority) (struct amdgpu_ring *ring,
>   			      enum drm_sched_priority priority);
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index e9a668b..1a48a92 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3905,6 +3905,12 @@ static void gfx_v9_0_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg,
>   	amdgpu_ring_write(ring, val);
>   }
>   
> +static void gfx_v9_ring_emit_invalidate_tlbs(struct amdgpu_ring *ring) {
> +	amdgpu_ring_write(ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));
> +	amdgpu_ring_write(ring, PACKET3_INVALIDATE_TLBS_DST_SEL(0) |
> +							PACKET3_INVALIDATE_TLBS_ALL_HUB(1));

That is once more way to far indented to the right.

With that fixed the patch is Reviewed-by: Christian König 
<christian.koenig at amd.com>

Christian.

> +}
> +
>   static void gfx_v9_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,
>   						 enum amdgpu_interrupt_state state)
>   {
> @@ -4280,6 +4286,7 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_kiq = {
>   	.pad_ib = amdgpu_ring_generic_pad_ib,
>   	.emit_rreg = gfx_v9_0_ring_emit_rreg,
>   	.emit_wreg = gfx_v9_0_ring_emit_wreg,
> +	.emit_invalidate_tlbs = gfx_v9_ring_emit_invalidate_tlbs,
>   };
>   
>   static void gfx_v9_0_set_ring_funcs(struct amdgpu_device *adev)
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15d.h b/drivers/gpu/drm/amd/amdgpu/soc15d.h
> index 7f408f8..f0d0b91 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc15d.h
> +++ b/drivers/gpu/drm/amd/amdgpu/soc15d.h
> @@ -267,7 +267,11 @@
>   			 * x=0: tmz_begin
>   			 * x=1: tmz_end
>   			 */
> -
> +#define	PACKET3_INVALIDATE_TLBS				0x98
> +#              define PACKET3_INVALIDATE_TLBS_DST_SEL(x)     ((x) << 0)
> +#              define PACKET3_INVALIDATE_TLBS_ALL_HUB(x)     ((x) << 4)
> +#              define PACKET3_INVALIDATE_TLBS_PASID(x)       ((x) << 5)
> +#              define PACKET3_INVALIDATE_TLBS_FLUSH_TYPE(x)  ((x) << 29)
>   #define PACKET3_SET_RESOURCES				0xA0
>   /* 1. header
>    * 2. CONTROL



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