________________________________
From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> on behalf of Rex Zhu <Rex.Zhu at amd.com>
Sent: Tuesday, December 12, 2017 2:24 AM
To: amd-gfx at lists.freedesktop.org
Cc: Zhu, Rex
Subject: [PATCH] drm/amd/pp: implement dpm_get_sclk/mclk for RV
Change-Id: I3abf5bde8c64ccab8e842a7c22aee011fc34e69f
Reviewed-by: Evan Quan <evan.quan at amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
---
drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c | 25 +++++++++++++++++++++++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
index 3e0b267..027fd63 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
@@ -523,12 +523,33 @@ static int rv_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
static uint32_t rv_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low)
{
- return 0;
+ struct rv_hwmgr *data;
+
+ if (hwmgr == NULL)
+ return -EINVAL;
+
+ data = (struct rv_hwmgr *)(hwmgr->backend);
+
+ if (low)
+ return data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk;
+ else
+ return data->clock_vol_info.vdd_dep_on_fclk->entries[
+ data->clock_vol_info.vdd_dep_on_fclk->count - 1].clk;
}
static uint32_t rv_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low)
{
- return 0;
+ struct rv_hwmgr *data;
+
+ if (hwmgr == NULL)
+ return -EINVAL;
+
+ data = (struct rv_hwmgr *)(hwmgr->backend);
+
+ if (low)
+ return data->gfx_min_freq_limit;
+ else
+ return data->gfx_max_freq_limit;
}
static int rv_dpm_patch_boot_state(struct pp_hwmgr *hwmgr,
--
1.9.1
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