> -----Original Message----- > From: Evan Quan [mailto:evan.quan at amd.com] > Sent: Tuesday, August 22, 2017 9:59 PM > To: amd-gfx at lists.freedesktop.org > Cc: Deucher, Alexander; Quan, Evan > Subject: [PATCH] drm/amd/powerplay: ACG frequency added in PPTable > > Change-Id: If1df87cf4a458d59ce2545a813c4594118fa4c3d > Signed-off-by: Evan Quan <evan.quan at amd.com> Reviewed-by: Alex Deucher <alexander.deucher at amd.com> > --- > drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 11 ++++++++- > -- > drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h | 6 ++++-- > 2 files changed, 12 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > index 0e7be87..1e16f84 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > @@ -1557,7 +1557,8 @@ static int vega10_populate_smc_link_levels(struct > pp_hwmgr *hwmgr) > */ > > static int vega10_populate_single_gfx_level(struct pp_hwmgr *hwmgr, > - uint32_t gfx_clock, PllSetting_t *current_gfxclk_level) > + uint32_t gfx_clock, PllSetting_t *current_gfxclk_level, > + uint32_t *acg_freq) > { > struct phm_ppt_v2_information *table_info = > (struct phm_ppt_v2_information *)(hwmgr- > >pptable); > @@ -1608,6 +1609,8 @@ static int vega10_populate_single_gfx_level(struct > pp_hwmgr *hwmgr, > cpu_to_le16(dividers.usPll_ss_slew_frac); > current_gfxclk_level->Did = (uint8_t)(dividers.ulDid); > > + *acg_freq = gfx_clock / 100; /* 100 Khz to Mhz conversion */ > + > return 0; > } > > @@ -1688,7 +1691,8 @@ static int > vega10_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) > for (i = 0; i < dpm_table->count; i++) { > result = vega10_populate_single_gfx_level(hwmgr, > dpm_table->dpm_levels[i].value, > - &(pp_table->GfxclkLevel[i])); > + &(pp_table->GfxclkLevel[i]), > + &(pp_table->AcgFreqTable[i])); > if (result) > return result; > } > @@ -1697,7 +1701,8 @@ static int > vega10_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) > while (i < NUM_GFXCLK_DPM_LEVELS) { > result = vega10_populate_single_gfx_level(hwmgr, > dpm_table->dpm_levels[j].value, > - &(pp_table->GfxclkLevel[i])); > + &(pp_table->GfxclkLevel[i]), > + &(pp_table->AcgFreqTable[i])); > if (result) > return result; > i++; > diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h > b/drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h > index f6d6c61..2818c98 100644 > --- a/drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h > +++ b/drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h > @@ -315,10 +315,12 @@ typedef struct { > uint8_t AcgEnable[NUM_GFXCLK_DPM_LEVELS]; > GbVdroopTable_t AcgBtcGbVdroopTable; > QuadraticInt_t AcgAvfsGb; > - uint32_t Reserved[4]; > + > + /* ACG Frequency Table, in Mhz */ > + uint32_t AcgFreqTable[NUM_GFXCLK_DPM_LEVELS]; > > /* Padding - ignore */ > - uint32_t MmHubPadding[7]; /* SMU internal use */ > + uint32_t MmHubPadding[3]; /* SMU internal use */ > > } PPTable_t; > > -- > 2.7.4
