On Mon, Aug 21, 2017 at 4:01 PM, Harry Wentland <harry.wentland at amd.com> wrote: > From: Roman Li <Roman.Li at amd.com> > > Added missing reg shift/masks to soc base > > Signed-off-by: Roman Li <Roman.Li at amd.com> > Reviewed-by: Harry Wentland <Harry.Wentland at amd.com> Acked-by: Alex Deucher <alexander.deucher at amd.com> > --- > drivers/gpu/drm/amd/display/dc/dce/dce_transform.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.h b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.h > index f9622ff54560..d87225d15cd9 100644 > --- a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.h > +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.h > @@ -237,6 +237,7 @@ > XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, mask_sh),\ > XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, mask_sh),\ > XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, mask_sh),\ > + XFM_SF(DCP0_REGAMMA_CONTROL, GRPH_REGAMMA_MODE, mask_sh),\ > XFM_SF(SCL0_SCL_MODE, SCL_MODE, mask_sh), \ > XFM_SF(SCL0_SCL_TAP_CONTROL, SCL_H_NUM_OF_TAPS, mask_sh), \ > XFM_SF(SCL0_SCL_TAP_CONTROL, SCL_V_NUM_OF_TAPS, mask_sh), \ > @@ -270,6 +271,8 @@ > XFM_SF(SCL0_SCL_UPDATE, SCL_COEF_UPDATE_COMPLETE, mask_sh), \ > XFM_SF(LB0_LB_DATA_FORMAT, ALPHA_EN, mask_sh), \ > XFM_SF(DCFE0_DCFE_MEM_PWR_CTRL, SCL_COEFF_MEM_PWR_DIS, mask_sh), \ > + XFM_SF(DCFE0_DCFE_MEM_PWR_CTRL, DCP_REGAMMA_MEM_PWR_DIS, mask_sh),\ > + XFM_SF(DCFE0_DCFE_MEM_PWR_CTRL, DCP_LUT_MEM_PWR_DIS, mask_sh),\ > XFM_SF(DCFE0_DCFE_MEM_PWR_STATUS, SCL_COEFF_MEM_PWR_STATE, mask_sh), \ > XFM_SF(SCL0_SCL_MODE, SCL_PSCL_EN, mask_sh) > > -- > 2.11.0 > > _______________________________________________ > amd-gfx mailing list > amd-gfx at lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx