Signed-off-by: Harry Wentland <harry.wentland at amd.com> Reviewed-by: Harry Wentland <Harry.Wentland at amd.com> --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 7d03f6ca2eaf..fd2ae181cff2 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -1550,7 +1550,7 @@ bool dc_link_setup_psr(struct dc_link *link, #if defined(CONFIG_DRM_AMD_DC_DCN1_0) /*skip power down the single pipe since it blocks the cstate*/ - if (ASIC_REV_IS_RAVEN(ctx->asic_id.hw_internal_rev)) + if (ASIC_REV_IS_RAVEN(link->ctx->asic_id.hw_internal_rev)) psr_context->psr_level.bits.SKIP_SINGLE_OTG_DISABLE = true; #endif diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index 32a24e8d2d4d..436850167aca 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -2514,7 +2514,7 @@ bool dc_validate_stream(const struct dc *dc, const struct dc_stream *stream) struct core_dc *core_dc = DC_TO_CORE(dc); struct dc_context *dc_ctx = core_dc->ctx; struct core_stream *core_stream = DC_STREAM_TO_CORE(stream); - struct core_link *link = core_stream->sink->link; + struct dc_link *link = core_stream->sink->link; struct timing_generator *tg = core_dc->res_pool->timing_generators[0]; enum dc_status res = DC_OK; -- 2.11.0