Caused by "add programming for 0 plane case" which was tested on DCN but
not on DCE.
Change-Id: If388fd66029c94f4aac03fd12320a89578aa8101
Signed-off-by: Harry Wentland <harry.wentland at amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky at amd.com>
Acked-by: Harry Wentland <Harry.Wentland at amd.com>
---
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index c29e51409286..5b46e776b9b7 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -2639,7 +2639,7 @@ static void dce110_apply_ctx_for_surface(
for (i = 0; i < dc->res_pool->pipe_count; i++) {
struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
- if (pipe_ctx->stream == stream)
+ if (pipe_ctx->stream != stream)
continue;
dce110_program_front_end_for_pipe(dc, pipe_ctx);
--
2.11.0
