> -----Original Message----- > From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf > Of Rex Zhu > Sent: Tuesday, April 18, 2017 7:35 AM > To: amd-gfx at lists.freedesktop.org > Cc: Zhu, Rex > Subject: [PATCH] drm/amdgpu: fix memory clock can't switch on CI. > > if we enable uvd dpm during boot time, > mclk will be fixed in the initially enabled level > for activity. In performance level, other leevels > can't be enabled by send the mask to SMC. > so set all mclk levels enabled. > > Change-Id: Id5c795317412a8013666fa432426d2713a27a2f8 > Signed-off-by: Rex Zhu <Rex.Zhu at amd.com> Reviewed-by: Alex Deucher <alexander.deucher at amd.com> > --- > drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c > b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c > index 11ccda8..a6dda34 100644 > --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c > +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c > @@ -3036,6 +3036,7 @@ static int ci_populate_single_memory_level(struct > amdgpu_device *adev, > memory_clock, > &memory_level- > >MinVddcPhases); > > + memory_level->EnabledForActivity = 1; > memory_level->EnabledForThrottle = 1; > memory_level->UpH = 0; > memory_level->DownH = 100; > @@ -3468,8 +3469,6 @@ static int ci_populate_all_memory_levels(struct > amdgpu_device *adev) > return ret; > } > > - pi->smc_state_table.MemoryLevel[0].EnabledForActivity = 1; > - > if ((dpm_table->mclk_table.count >= 2) && > ((adev->pdev->device == 0x67B0) || (adev->pdev->device == > 0x67B1))) { > pi->smc_state_table.MemoryLevel[1].MinVddc = > -- > 1.9.1 > > _______________________________________________ > amd-gfx mailing list > amd-gfx at lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
