On Mon, Apr 17, 2017 at 8:30 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> As the kiq ring is NULL in baremetal case,
> the irq function will result in a BUG_ON in some case.
>
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
We need to rework this eventually to mirror gfx8 so we can enable KIQ
for gfx9 bare metal, but for now:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 15 +++++++++------
> 1 file changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index f6b2329..35657c3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1029,9 +1029,11 @@ static int gfx_v9_0_sw_init(void *handle)
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> /* KIQ event */
> - r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_GRBM_CP, 178, &adev->gfx.kiq.irq);
> - if (r)
> - return r;
> + if (amdgpu_sriov_vf()) {
> + r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_GRBM_CP, 178, &adev->gfx.kiq.irq);
> + if (r)
> + return r;
> + }
>
> /* EOP Event */
> r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_GRBM_CP, 181, &adev->gfx.eop_irq);
> @@ -3590,9 +3592,10 @@ static void gfx_v9_0_set_irq_funcs(struct amdgpu_device *adev)
>
> adev->gfx.priv_inst_irq.num_types = 1;
> adev->gfx.priv_inst_irq.funcs = &gfx_v9_0_priv_inst_irq_funcs;
> -
> - adev->gfx.kiq.irq.num_types = AMDGPU_CP_KIQ_IRQ_LAST;
> - adev->gfx.kiq.irq.funcs = &gfx_v9_0_kiq_irq_funcs;
> + if (amdgpu_sriov_vf(adev)) {
> + adev->gfx.kiq.irq.num_types = AMDGPU_CP_KIQ_IRQ_LAST;
> + adev->gfx.kiq.irq.funcs = &gfx_v9_0_kiq_irq_funcs;
> + }
> }
>
> static void gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev)
> --
> 1.9.1
>
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