[PATCH 01/10] drm/amd/amdgpu: cleanup gfx_v9_0_init_queue()

[deathsimple@xxxxxxxxxxx (Christian König)]

Am 05.04.2017 um 15:26 schrieb Tom St Denis:
> Introduce WREG32_FIELD15 macro for SOC15 architectures.
>
> Signed-off-by: Tom St Denis <tom.stdenis at amd.com>

Reviewed-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h   |  3 +++
>   drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 11 +++--------
>   2 files changed, 6 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index d0a3987b221a..04c84332cc58 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1719,6 +1719,9 @@ bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
>   #define WREG32_FIELD_OFFSET(reg, offset, field, val)	\
>   	WREG32(mm##reg + offset, (RREG32(mm##reg + offset) & ~REG_FIELD_MASK(reg, field)) | (val) << REG_FIELD_SHIFT(reg, field))
>   
> +#define WREG32_FIELD15(ip, idx, reg, field, val)	\
> +	WREG32(SOC15_REG_OFFSET(ip, idx, mm##reg), (RREG32(SOC15_REG_OFFSET(ip, idx, mm##reg)) & ~REG_FIELD_MASK(reg, field)) | (val) << REG_FIELD_SHIFT(reg, field))
> +
>   /*
>    * BIOS helpers.
>    */
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index a967879524bc..3888743bc868 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3975,9 +3975,7 @@ static int gfx_v9_0_init_queue(struct amdgpu_ring *ring)
>   			       ring->pipe,
>   			       ring->queue, 0);
>   	/* disable wptr polling */
> -	tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_PQ_WPTR_POLL_CNTL));
> -	tmp = REG_SET_FIELD(tmp, CP_PQ_WPTR_POLL_CNTL, EN, 0);
> -	WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_PQ_WPTR_POLL_CNTL), tmp);
> +	WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0);
>   
>   	/* write the EOP addr */
>   	BUG_ON(ring->me != 1 || ring->pipe != 0); /* can't handle other cases eop address */
> @@ -4121,11 +4119,8 @@ static int gfx_v9_0_init_queue(struct amdgpu_ring *ring)
>   	amdgpu_bo_kunmap(ring->mqd_obj);
>   	amdgpu_bo_unreserve(ring->mqd_obj);
>   
> -	if (use_doorbell) {
> -		tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_PQ_STATUS));
> -		tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1);
> -		WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_PQ_STATUS), tmp);
> -	}
> +	if (use_doorbell)
> +		WREG32_FIELD15(GC, 0, CP_PQ_STATUS, DOORBELL_ENABLE, 1);
>   
>   	return 0;
>   }