[PATCH 01/10] drm/amd/display: Allow multiple instance of DTO regs

[harry.wentland@xxxxxxx (Harry Wentland)]

From: Tony Cheng <tony.cheng@xxxxxxx>

Change-Id: I9b1aee0a58a25e91a5bc8cf60fa4b2bb25a1b4c4
Signed-off-by: Tony Cheng <tony.cheng at amd.com>
Reviewed-by: Jordan Lazare <Jordan.Lazare at amd.com>
Acked-by: Harry Wentland <Harry.Wentland at amd.com>
---
 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
index 8ee00712ef8e..28984c79fc46 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
@@ -76,9 +76,13 @@ struct dce110_clk_src_regs {
 	uint32_t RESYNC_CNTL;
 	uint32_t PIXCLK_RESYNC_CNTL;
 	uint32_t PLL_CNTL;
-	uint32_t PHASE;
-	uint32_t MODULO;
-	uint32_t PIXEL_RATE_CNTL;
+
+	/* below are for DTO.
+	 * todo: should probably use different struct to not waste space
+	 */
+	uint32_t PHASE[4];
+	uint32_t MODULO[4];
+	uint32_t PIXEL_RATE_CNTL[4];
 };
 
 struct dce110_clk_src {
-- 
2.9.3