From: Ding Wang <Ding.Wang@xxxxxxx> Change-Id: Iaec8b8c429f9e9dfa1b1dd50a9f846de6cd15c26 Signed-off-by: Ding Wang <Ding.Wang at amd.com> Reviewed-by: Tony Cheng <Tony.Cheng at amd.com> Acked-by: Harry Wentland <Harry.Wentland at amd.com> --- drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c index 12a258763ef1..e70704d1ba87 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c @@ -1117,6 +1117,10 @@ bool dce110_timing_generator_validate_timing( if (timing->timing_3d_format != TIMING_3D_FORMAT_NONE) return false; + /* Temporarily blocking interlacing mode until it's supported */ + if (timing->flags.INTERLACE == 1) + return false; + /* Check maximum number of pixels supported by Timing Generator * (Currently will never fail, in order to fail needs display which * needs more than 8192 horizontal and -- 2.9.3
