Hi Just another gentle ping to see where you are with this? Cheers Mike On Wed, 12 Oct 2016 at 01:40 Michel Dänzer <michel at daenzer.net> wrote: > On 11/10/16 09:04 PM, Christian König wrote: > > Am 11.10.2016 um 05:58 schrieb Michel Dänzer: > >> On 07/10/16 09:34 PM, Mike Lothian wrote: > >>> This has discussion has gone a little quiet > >>> > >>> Was there any agreement about what needed doing to get this working > >>> for i965/amdgpu? > >> Christian, do you see anything which could prevent the solution I > >> outlined from working? > > > > I thought about that approach as well, but unfortunately it also has a > > couple of downsides. Especially keeping the exclusive fence set while we > > actually don't need it isn't really clean either. > > I was wondering if it's possible to have a singleton pseudo exclusive > fence which is used for all BOs. That might keep the overhead acceptably > low. > > > > I'm currently a bit busy with other tasks and so put Nayan on a road to > > get a bit into the kernel driver (he asked for that anyway). > > > > Implementing the simple workaround to sync when we export the DMA-buf > > should be something like 20 lines of code and fortunately Nayan has an > > I+A system and so can actually test it. > > > > If it turns out to be more problematic or somebody really starts to need > > it I'm going to hack on that myself a bit more. > > If you mean only syncing when a DMA-buf is exported, that's not enough, > as I explained before. The BOs being shared are long-lived, and > synchronization between GPUs is required for every command stream > submission. > > > -- > Earthling Michel Dänzer | http://www.amd.com > Libre software enthusiast | Mesa and X developer > -------------- next part -------------- An HTML attachment was scrubbed... URL: <https://lists.freedesktop.org/archives/amd-gfx/attachments/20161027/fe07fbb4/attachment.html>
