On Thu, Oct 13, 2016 at 5:54 PM, Tom St Denis <tstdenis82 at gmail.com> wrote:
> From: Tom St Denis <tstdenis82 at gmail.com>
>
> Limit clocks on a specific HD86xx part to avoid
> crashes (while awaiting an appropriate PP fix).
>
> Signed-off-by: Tom St Denis <tom.stdenis at amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/si_dpm.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
> index 8bd08925b370..3de7bca5854b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
> @@ -3499,6 +3499,12 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
> max_sclk = 75000;
> max_mclk = 80000;
> }
> + /* Limit clocks for some HD8600 parts */
> + if (adev->pdev->device == 0x6660 &&
> + adev->pdev->revision == 0x83) {
> + max_sclk = 75000;
> + max_mclk = 80000;
> + }
>
> if (rps->vce_active) {
> rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk;
> --
> 2.10.0
>
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