[PATCH 5/6] drm/amdgpu/powerplay: add an implementation for get_vce_clock_table

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Used by the powerplay dpm code.

Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index bb8a345..8eee390 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -30,6 +30,7 @@
 #include "power_state.h"
 #include "eventmanager.h"
 #include "pp_debug.h"
+#include "drm/amdgpu_drm.h"
 
 
 #define PP_CHECK(handle)						\
@@ -821,6 +822,28 @@ static int pp_dpm_read_sensor(void *handle, int idx, int32_t *value)
 	return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value);
 }
 
+static struct drm_amdgpu_info_vce_clock_table
+pp_dpm_get_vce_clock_table(void *handle)
+{
+	struct drm_amdgpu_info_vce_clock_table vce_clk_table = {};
+	struct pp_hwmgr *hwmgr;
+	unsigned i;
+
+	if (handle) {
+		hwmgr = ((struct pp_instance *)handle)->hwmgr;
+
+		if (hwmgr) {
+			for (i = 0; i < AMDGPU_VCE_CLOCK_TABLE_ENTRIES; i++) {
+				vce_clk_table.entries[i].sclk = hwmgr->vce_states[i].sclk;
+				vce_clk_table.entries[i].mclk = hwmgr->vce_states[i].mclk;
+				vce_clk_table.entries[i].eclk = hwmgr->vce_states[i].evclk;
+			}
+		}
+	}
+
+	return vce_clk_table;
+}
+
 const struct amd_powerplay_funcs pp_dpm_funcs = {
 	.get_temperature = pp_dpm_get_temperature,
 	.load_firmware = pp_dpm_load_fw,
@@ -847,6 +870,7 @@ const struct amd_powerplay_funcs pp_dpm_funcs = {
 	.get_mclk_od = pp_dpm_get_mclk_od,
 	.set_mclk_od = pp_dpm_set_mclk_od,
 	.read_sensor = pp_dpm_read_sensor,
+	.get_vce_clock_table = pp_dpm_get_vce_clock_table,
 };
 
 static int amd_pp_instance_init(struct amd_pp_init *pp_init,
-- 
2.5.5



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