From: Dmytro Laktyushkin <Dmytro.Laktyushkin@xxxxxxx>
Change-Id: I6231292e0295c1be32fa9dca74895d02426a3a67
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin at amd.com>
Acked-by: Harry Wentland <harry.wentland at amd.com>
---
drivers/gpu/drm/amd/dal/dc/core/dc_resource.c | 4 +-
.../gpu/drm/amd/dal/dc/dce100/dce100_resource.c | 13 ---
.../drm/amd/dal/dc/dce110/dce110_hw_sequencer.c | 13 +--
.../gpu/drm/amd/dal/dc/dce110/dce110_resource.c | 17 ----
.../gpu/drm/amd/dal/dc/dce110/dce110_transform.c | 7 --
.../gpu/drm/amd/dal/dc/dce110/dce110_transform.h | 12 +--
.../amd/dal/dc/dce110/dce110_transform_bit_depth.c | 101 ---------------------
.../drm/amd/dal/dc/dce110/dce110_transform_scl.c | 72 ++++++++++-----
.../gpu/drm/amd/dal/dc/dce110/dce110_transform_v.c | 24 +----
.../gpu/drm/amd/dal/dc/dce110/dce110_transform_v.h | 4 -
.../gpu/drm/amd/dal/dc/dce112/dce112_resource.c | 13 ---
drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c | 4 +-
drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.c | 6 --
drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.h | 10 +-
.../amd/dal/dc/dce80/dce80_transform_bit_depth.c | 38 --------
.../gpu/drm/amd/dal/dc/dce80/dce80_transform_scl.c | 43 ++++-----
drivers/gpu/drm/amd/dal/dc/inc/hw/transform.h | 35 +++----
17 files changed, 86 insertions(+), 330 deletions(-)
diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
index 25b03cba906e..920a4ba42a6a 100644
--- a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c
@@ -528,7 +528,7 @@ bool resource_build_scaling_params(
* Setting line buffer pixel depth to 24bpp yields banding
* on certain displays, such as the Sharp 4k
*/
- pipe_ctx->scl_data.lb_bpp = LB_PIXEL_DEPTH_30BPP;
+ pipe_ctx->scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP;
pipe_ctx->scl_data.h_active = timing->h_addressable;
pipe_ctx->scl_data.v_active = timing->v_addressable;
@@ -539,7 +539,7 @@ bool resource_build_scaling_params(
if (!res) {
/* Try 24 bpp linebuffer */
- pipe_ctx->scl_data.lb_bpp = LB_PIXEL_DEPTH_24BPP;
+ pipe_ctx->scl_data.lb_params.depth = LB_PIXEL_DEPTH_24BPP;
res = pipe_ctx->xfm->funcs->transform_get_optimal_number_of_taps(
pipe_ctx->xfm, &pipe_ctx->scl_data, &surface->scaling_quality);
diff --git a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c
index c94695e603bd..4c19d2f3849d 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce100/dce100_resource.c
@@ -716,9 +716,6 @@ static void destruct(struct dce110_resource_pool *pool)
if (pool->base.display_clock != NULL)
dal_display_clock_destroy(&pool->base.display_clock);
- if (pool->base.scaler_filter != NULL)
- dal_scaler_filter_destroy(&pool->base.scaler_filter);
-
if (pool->base.irqs != NULL)
dal_irq_service_destroy(&pool->base.irqs);
}
@@ -1000,16 +997,9 @@ static bool construct(
*************************************************/
pool->base.underlay_pipe_index = -1;
pool->base.pipe_count = res_cap.num_timing_generator;
- pool->base.scaler_filter = dal_scaler_filter_create(ctx);
dc->public.caps.max_downscale_ratio = 200;
dc->public.caps.i2c_speed_in_khz = 40;
- if (pool->base.scaler_filter == NULL) {
- BREAK_TO_DEBUGGER();
- dm_error("DC: failed to create filter!\n");
- goto res_create_fail;
- }
-
for (i = 0; i < pool->base.pipe_count; i++) {
pool->base.timing_generators[i] =
dce100_timing_generator_create(
@@ -1048,9 +1038,6 @@ static bool construct(
"DC: failed to create transform!\n");
goto res_create_fail;
}
- pool->base.transforms[i]->funcs->transform_set_scaler_filter(
- pool->base.transforms[i],
- pool->base.scaler_filter);
pool->base.opps[i] = dce100_opp_create(ctx, i, &dce100_opp_reg_offsets[i]);
if (pool->base.opps[i] == NULL) {
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
index eb37e58c66c9..c6c2d01a2e5b 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c
@@ -559,7 +559,7 @@ static void program_scaler(const struct core_dc *dc,
pipe_ctx->xfm->funcs->transform_set_pixel_storage_depth(
pipe_ctx->xfm,
- pipe_ctx->scl_data.lb_bpp,
+ pipe_ctx->scl_data.lb_params.depth,
&pipe_ctx->stream->bit_depth_params);
if (pipe_ctx->tg->funcs->set_overscan_blank_color)
@@ -687,6 +687,7 @@ static enum dc_status apply_single_controller_ctx_to_hw(
&stream->sink->link->public.cur_link_settings);
}
+ pipe_ctx->scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0;
/* program_scaler and allocate_mem_input are not new asic */
if (!pipe_ctx_old || memcmp(&pipe_ctx_old->scl_data,
&pipe_ctx->scl_data,
@@ -1382,7 +1383,7 @@ static void set_default_colors(struct pipe_ctx *pipe_ctx)
pipe_ctx->stream->public.timing.display_color_depth;
/* Lb color depth */
- default_adjust.lb_color_depth = pipe_ctx->scl_data.lb_bpp;
+ default_adjust.lb_color_depth = pipe_ctx->scl_data.lb_params.depth;
pipe_ctx->opp->funcs->opp_set_csc_default(
pipe_ctx->opp, &default_adjust);
@@ -1472,13 +1473,11 @@ static void set_plane_config(
pipe_ctx->xfm->funcs->transform_set_gamut_remap(pipe_ctx->xfm, &adjust);
+ pipe_ctx->scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0;
program_scaler(dc, pipe_ctx);
program_blender(dc, pipe_ctx);
- if (pipe_ctx->bottom_pipe)
- pipe_ctx->xfm->funcs->transform_set_alpha(pipe_ctx->xfm, true);
-
mi->funcs->mem_input_program_surface_config(
mi,
surface->public.format,
@@ -1815,14 +1814,12 @@ static void dce110_program_front_end_for_pipe(
pipe_ctx->xfm->funcs->transform_set_gamut_remap(pipe_ctx->xfm, &adjust);
+ pipe_ctx->scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0;
if (old_pipe && memcmp(&old_pipe->scl_data,
&pipe_ctx->scl_data,
sizeof(struct scaler_data)) != 0)
program_scaler(dc, pipe_ctx);
- if (pipe_ctx->bottom_pipe)
- pipe_ctx->xfm->funcs->transform_set_alpha(pipe_ctx->xfm, true);
-
mi->funcs->mem_input_program_surface_config(
mi,
surface->public.format,
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
index f9cebc9680a6..961aa3f26999 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c
@@ -687,9 +687,6 @@ static void destruct(struct dce110_resource_pool *pool)
dal_display_clock_destroy(&pool->base.display_clock);
}
- if (pool->base.scaler_filter != NULL) {
- dal_scaler_filter_destroy(&pool->base.scaler_filter);
- }
if (pool->base.irqs != NULL) {
dal_irq_service_destroy(&pool->base.irqs);
}
@@ -1110,10 +1107,6 @@ static void underlay_create(struct dc_context *ctx, struct resource_pool *pool)
pool->timing_generators[pool->pipe_count] = &dce110_tgv->base;
pool->mis[pool->pipe_count] = &dce110_miv->base;
pool->transforms[pool->pipe_count] = &dce110_xfmv->base;
-
- pool->transforms[pool->pipe_count]->funcs->transform_set_scaler_filter(
- pool->transforms[pool->pipe_count],
- pool->scaler_filter);
pool->pipe_count++;
/* update the public caps to indicate an underlay is available */
@@ -1317,13 +1310,6 @@ static bool construct(
goto res_create_fail;
}
- pool->base.scaler_filter = dal_scaler_filter_create(ctx);
- if (pool->base.scaler_filter == NULL) {
- BREAK_TO_DEBUGGER();
- dm_error("DC: failed to create filter!\n");
- goto res_create_fail;
- }
-
for (i = 0; i < pool->base.pipe_count; i++) {
pool->base.timing_generators[i] = dce110_timing_generator_create(
ctx, i, &dce110_tg_offsets[i]);
@@ -1358,9 +1344,6 @@ static bool construct(
"DC: failed to create transform!\n");
goto res_create_fail;
}
- pool->base.transforms[i]->funcs->transform_set_scaler_filter(
- pool->base.transforms[i],
- pool->base.scaler_filter);
pool->base.opps[i] = dce110_opp_create(ctx, i, &dce110_opp_reg_offsets[i]);
if (pool->base.opps[i] == NULL) {
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform.c
index a8973795eeeb..492856290470 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform.c
@@ -76,17 +76,10 @@ static const struct transform_funcs dce110_transform_funcs = {
dce110_transform_power_up,
.transform_set_scaler =
dce110_transform_set_scaler,
- .transform_set_scaler_bypass =
- dce110_transform_set_scaler_bypass,
- .transform_set_scaler_filter =
- dce110_transform_set_scaler_filter,
.transform_set_gamut_remap =
dce110_transform_set_gamut_remap,
.transform_set_pixel_storage_depth =
dce110_transform_set_pixel_storage_depth,
- .transform_get_current_pixel_storage_depth =
- dce110_transform_get_current_pixel_storage_depth,
- .transform_set_alpha = dce110_transform_set_alpha,
.transform_get_optimal_number_of_taps =
dce110_transform_get_optimal_number_of_taps
};
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform.h
index 6a2f2b0279e9..7f3e50bbb4f1 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform.h
@@ -59,14 +59,10 @@ bool dce110_transform_construct(struct dce110_transform *xfm110,
bool dce110_transform_power_up(struct transform *xfm);
/* SCALER RELATED */
-bool dce110_transform_set_scaler(
+void dce110_transform_set_scaler(
struct transform *xfm,
const struct scaler_data *data);
-void dce110_transform_set_scaler_bypass(
- struct transform *xfm,
- const struct scaler_data *scl_data);
-
void dce110_transform_set_scaler_filter(
struct transform *xfm,
struct scaler_filter *filter);
@@ -82,12 +78,6 @@ bool dce110_transform_set_pixel_storage_depth(
enum lb_pixel_depth depth,
const struct bit_depth_reduction_params *bit_depth_params);
-bool dce110_transform_get_current_pixel_storage_depth(
- struct transform *xfm,
- enum lb_pixel_depth *depth);
-
-void dce110_transform_set_alpha(struct transform *xfm, bool enable);
-
bool dce110_transform_get_optimal_number_of_taps(
struct transform *xfm,
struct scaler_data *scl_data,
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_bit_depth.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_bit_depth.c
index 48a10128a9c2..966c90bab67c 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_bit_depth.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_bit_depth.c
@@ -582,31 +582,6 @@ int32_t dce110_transform_get_max_num_of_supported_lines(
return (max_pixels_supports / pixel_width);
}
-void dce110_transform_set_alpha(struct transform *xfm, bool enable)
-{
- struct dce110_transform *xfm110 = TO_DCE110_TRANSFORM(xfm);
- struct dc_context *ctx = xfm->ctx;
- uint32_t value;
- uint32_t addr = LB_REG(mmLB_DATA_FORMAT);
-
- value = dm_read_reg(ctx, addr);
-
- if (enable == 1)
- set_reg_field_value(
- value,
- 1,
- LB_DATA_FORMAT,
- ALPHA_EN);
- else
- set_reg_field_value(
- value,
- 0,
- LB_DATA_FORMAT,
- ALPHA_EN);
-
- dm_write_reg(ctx, addr, value);
-}
-
bool dce110_transform_is_prefetch_enabled(
struct dce110_transform *xfm110)
{
@@ -619,44 +594,6 @@ bool dce110_transform_is_prefetch_enabled(
return false;
}
-bool dce110_transform_get_current_pixel_storage_depth(
- struct transform *xfm,
- enum lb_pixel_depth *depth)
-{
- struct dce110_transform *xfm110 = TO_DCE110_TRANSFORM(xfm);
- uint32_t value = 0;
-
- if (depth == NULL)
- return false;
-
- value = dm_read_reg(
- xfm->ctx,
- LB_REG(mmLB_DATA_FORMAT));
-
- switch (get_reg_field_value(value, LB_DATA_FORMAT, PIXEL_DEPTH)) {
- case 0:
- *depth = LB_PIXEL_DEPTH_30BPP;
- break;
- case 1:
- *depth = LB_PIXEL_DEPTH_24BPP;
- break;
- case 2:
- *depth = LB_PIXEL_DEPTH_18BPP;
- break;
- case 3:
- *depth = LB_PIXEL_DEPTH_36BPP;
- break;
- default:
- dm_logger_write(xfm->ctx->logger, LOG_WARNING,
- "%s: Invalid LB pixel depth",
- __func__);
- *depth = LB_PIXEL_DEPTH_30BPP;
- break;
- }
- return true;
-
-}
-
static void set_denormalization(
struct dce110_transform *xfm110,
enum dc_color_depth depth)
@@ -795,44 +732,6 @@ bool dce110_transform_power_up_line_buffer(struct transform *xfm)
}
/* Underlay pipe functions*/
-
-bool dce110_transform_v_get_current_pixel_storage_depth(
- struct transform *xfm,
- enum lb_pixel_depth *depth)
-{
- uint32_t value = 0;
-
- if (depth == NULL)
- return false;
-
- value = dm_read_reg(
- xfm->ctx,
- mmLBV_DATA_FORMAT);
-
- switch (get_reg_field_value(value, LBV_DATA_FORMAT, PIXEL_DEPTH)) {
- case 0:
- *depth = LB_PIXEL_DEPTH_30BPP;
- break;
- case 1:
- *depth = LB_PIXEL_DEPTH_24BPP;
- break;
- case 2:
- *depth = LB_PIXEL_DEPTH_18BPP;
- break;
- case 3:
- *depth = LB_PIXEL_DEPTH_36BPP;
- break;
- default:
- dm_logger_write(xfm->ctx->logger, LOG_WARNING,
- "%s: Invalid LB pixel depth",
- __func__);
- *depth = LB_PIXEL_DEPTH_30BPP;
- break;
- }
- return true;
-
-}
-
bool dce110_transform_v_set_pixel_storage_depth(
struct transform *xfm,
enum lb_pixel_depth depth,
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_scl.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_scl.c
index 9dea5018c6b9..addf89c47ed0 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_scl.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_scl.c
@@ -42,6 +42,9 @@
#define DCFE_REG(reg)\
(reg + xfm110->offsets.dcfe_offset)
+#define LB_REG(reg)\
+ (reg + xfm110->offsets.lb_offset)
+
#define SCL_PHASES 16
static const uint16_t filter_2tap_16p[18] = {
@@ -175,6 +178,21 @@ static void disable_enhanced_sharpness(struct dce110_transform *xfm110)
SCL_REG(mmSCL_F_SHARP_CONTROL), value);
}
+static void dce110_transform_set_scaler_bypass(
+ struct transform *xfm,
+ const struct scaler_data *scl_data)
+{
+ struct dce110_transform *xfm110 = TO_DCE110_TRANSFORM(xfm);
+ uint32_t scl_mode;
+
+ disable_enhanced_sharpness(xfm110);
+
+ scl_mode = dm_read_reg(xfm->ctx, SCL_REG(mmSCL_MODE));
+ set_reg_field_value(scl_mode, 0, SCL_MODE, SCL_MODE);
+ set_reg_field_value(scl_mode, 0, SCL_MODE, SCL_PSCL_EN);
+ dm_write_reg(xfm->ctx, SCL_REG(mmSCL_MODE), scl_mode);
+}
+
/*
* @Function:
* void setup_scaling_configuration
@@ -588,7 +606,33 @@ static const uint16_t *get_filter_coeffs_16p(int taps, struct fixed31_32 ratio)
}
}
-bool dce110_transform_set_scaler(
+
+static void dce110_transform_set_alpha(struct transform *xfm, bool enable)
+{
+ struct dce110_transform *xfm110 = TO_DCE110_TRANSFORM(xfm);
+ struct dc_context *ctx = xfm->ctx;
+ uint32_t value;
+ uint32_t addr = LB_REG(mmLB_DATA_FORMAT);
+
+ value = dm_read_reg(ctx, addr);
+
+ if (enable == 1)
+ set_reg_field_value(
+ value,
+ 1,
+ LB_DATA_FORMAT,
+ ALPHA_EN);
+ else
+ set_reg_field_value(
+ value,
+ 0,
+ LB_DATA_FORMAT,
+ ALPHA_EN);
+
+ dm_write_reg(ctx, addr, value);
+}
+
+void dce110_transform_set_scaler(
struct transform *xfm,
const struct scaler_data *data)
{
@@ -658,29 +702,7 @@ bool dce110_transform_set_scaler(
if (filter_updated)
set_coeff_update_complete(xfm110);
- return true;
-}
-
-void dce110_transform_set_scaler_bypass(
- struct transform *xfm,
- const struct scaler_data *scl_data)
-{
- struct dce110_transform *xfm110 = TO_DCE110_TRANSFORM(xfm);
- uint32_t scl_mode;
-
- disable_enhanced_sharpness(xfm110);
-
- scl_mode = dm_read_reg(xfm->ctx, SCL_REG(mmSCL_MODE));
- set_reg_field_value(scl_mode, 0, SCL_MODE, SCL_MODE);
- set_reg_field_value(scl_mode, 0, SCL_MODE, SCL_PSCL_EN);
- dm_write_reg(xfm->ctx, SCL_REG(mmSCL_MODE), scl_mode);
-}
-
-void dce110_transform_set_scaler_filter(
- struct transform *xfm,
- struct scaler_filter *filter)
-{
- xfm->filter = filter;
+ dce110_transform_set_alpha(xfm, data->lb_params.alpha_en);
}
#define IDENTITY_RATIO(ratio) (dal_fixed31_32_u2d19(ratio) == (1 << 19))
@@ -716,7 +738,7 @@ bool transform_get_optimal_number_of_taps_helper(
max_num_of_lines = dce110_transform_get_max_num_of_supported_lines(
xfm,
- scl_data->lb_bpp,
+ scl_data->lb_params.depth,
pixel_width);
/* Fail if in_taps are impossible */
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.c
index b17929dc51ea..751f33f48422 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.c
@@ -673,20 +673,6 @@ static void program_scl_ratios_inits(
dm_write_reg(ctx, addr, value);
}
-static void dce110_transform_v_set_scalerv_bypass(
- struct transform *xfm,
- const struct scaler_data *scl_data)
-{
- uint32_t addr = mmSCLV_MODE;
- uint32_t value = dm_read_reg(xfm->ctx, addr);
-
- set_reg_field_value(value, 0, SCLV_MODE, SCL_MODE);
- set_reg_field_value(value, 0, SCLV_MODE, SCL_MODE_C);
- set_reg_field_value(value, 0, SCLV_MODE, SCL_PSCL_EN);
- set_reg_field_value(value, 0, SCLV_MODE, SCL_PSCL_EN_C);
- dm_write_reg(xfm->ctx, addr, value);
-}
-
static const uint16_t *get_filter_coeffs_64p(int taps, struct fixed31_32 ratio)
{
if (taps == 4)
@@ -702,7 +688,7 @@ static const uint16_t *get_filter_coeffs_64p(int taps, struct fixed31_32 ratio)
}
}
-static bool dce110_transform_v_set_scaler(
+static void dce110_transform_v_set_scaler(
struct transform *xfm,
const struct scaler_data *data)
{
@@ -786,8 +772,6 @@ static bool dce110_transform_v_set_scaler(
/* 8. Set bit to flip to new coefficient memory */
if (filter_updated)
set_coeff_update_complete(xfm110);
-
- return true;
}
static bool dce110_transform_v_power_up_line_buffer(struct transform *xfm)
@@ -825,16 +809,10 @@ static const struct transform_funcs dce110_transform_v_funcs = {
dce110_transform_v_power_up_line_buffer,
.transform_set_scaler =
dce110_transform_v_set_scaler,
- .transform_set_scaler_bypass =
- dce110_transform_v_set_scalerv_bypass,
- .transform_set_scaler_filter =
- dce110_transform_set_scaler_filter,
.transform_set_gamut_remap =
dce110_transform_set_gamut_remap,
.transform_set_pixel_storage_depth =
dce110_transform_v_set_pixel_storage_depth,
- .transform_get_current_pixel_storage_depth =
- dce110_transform_v_get_current_pixel_storage_depth,
.transform_get_optimal_number_of_taps =
dce110_transform_get_optimal_number_of_taps
};
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.h
index 2d803087cad9..57fcb28ba986 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.h
@@ -34,10 +34,6 @@ bool dce110_transform_v_construct(
struct dce110_transform *xfm110,
struct dc_context *ctx);
-bool dce110_transform_v_get_current_pixel_storage_depth(
- struct transform *xfm,
- enum lb_pixel_depth *depth);
-
bool dce110_transform_v_set_pixel_storage_depth(
struct transform *xfm,
enum lb_pixel_depth depth,
diff --git a/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c
index e0b3266fdef0..054f918185fc 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c
@@ -749,9 +749,6 @@ static void destruct(struct dce110_resource_pool *pool)
dal_display_clock_destroy(&pool->base.display_clock);
}
- if (pool->base.scaler_filter != NULL) {
- dal_scaler_filter_destroy(&pool->base.scaler_filter);
- }
if (pool->base.irqs != NULL) {
dal_irq_service_destroy(&pool->base.irqs);
}
@@ -1342,13 +1339,6 @@ static bool construct(
goto res_create_fail;
}
- pool->base.scaler_filter = dal_scaler_filter_create(ctx);
- if (pool->base.scaler_filter == NULL) {
- BREAK_TO_DEBUGGER();
- dm_error("DC: failed to create filter!\n");
- goto res_create_fail;
- }
-
for (i = 0; i < pool->base.pipe_count; i++) {
pool->base.timing_generators[i] =
dce112_timing_generator_create(
@@ -1393,9 +1383,6 @@ static bool construct(
"DC: failed to create transform!\n");
goto res_create_fail;
}
- pool->base.transforms[i]->funcs->transform_set_scaler_filter(
- pool->base.transforms[i],
- pool->base.scaler_filter);
pool->base.opps[i] = dce112_opp_create(
ctx,
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c
index 3de40302eb89..dbdce062e4e9 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_resource.c
@@ -1035,9 +1035,7 @@ static bool construct(
dm_error("DC: failed to create transform!\n");
goto res_create_fail;
}
- pool->base.transforms[i]->funcs->transform_set_scaler_filter(
- pool->base.transforms[i],
- pool->base.scaler_filter);
+ pool->base.transforms[i]->filter = pool->base.scaler_filter;
pool->base.opps[i] = dce80_opp_create(ctx, i);
if (pool->base.opps[i] == NULL) {
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.c b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.c
index 48cbcbb28c77..e99950f40439 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.c
@@ -66,16 +66,10 @@ static const struct transform_funcs dce80_transform_funcs = {
dce80_transform_power_up,
.transform_set_scaler =
dce80_transform_set_scaler,
- .transform_set_scaler_bypass =
- dce80_transform_set_scaler_bypass,
- .transform_set_scaler_filter =
- dce80_transform_set_scaler_filter,
.transform_set_gamut_remap =
dce80_transform_set_gamut_remap,
.transform_set_pixel_storage_depth =
dce80_transform_set_pixel_storage_depth,
- .transform_get_current_pixel_storage_depth =
- dce80_transform_get_current_pixel_storage_depth,
.transform_get_optimal_number_of_taps =
dce80_transform_get_optimal_number_of_taps
};
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.h b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.h
index 3d14e04ceeb3..ce625ac417df 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.h
@@ -55,14 +55,10 @@ bool dce80_transform_construct(struct dce80_transform *xfm80,
bool dce80_transform_power_up(struct transform *xfm);
/* SCALER RELATED */
-bool dce80_transform_set_scaler(
+void dce80_transform_set_scaler(
struct transform *xfm,
const struct scaler_data *data);
-void dce80_transform_set_scaler_bypass(
- struct transform *xfm,
- const struct scaler_data *scl_data);
-
void dce80_transform_set_scaler_filter(
struct transform *xfm,
struct scaler_filter *filter);
@@ -78,8 +74,4 @@ bool dce80_transform_set_pixel_storage_depth(
enum lb_pixel_depth depth,
const struct bit_depth_reduction_params *bit_depth_params);
-bool dce80_transform_get_current_pixel_storage_depth(
- struct transform *xfm,
- enum lb_pixel_depth *depth);
-
#endif
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform_bit_depth.c b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform_bit_depth.c
index cd310a99144c..7d03684a4e7c 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform_bit_depth.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform_bit_depth.c
@@ -563,44 +563,6 @@ bool dce80_transform_is_prefetch_enabled(
return false;
}
-bool dce80_transform_get_current_pixel_storage_depth(
- struct transform *xfm,
- enum lb_pixel_depth *depth)
-{
- struct dce80_transform *xfm80 = TO_DCE80_TRANSFORM(xfm);
- uint32_t value = 0;
-
- if (depth == NULL)
- return false;
-
- value = dm_read_reg(
- xfm->ctx,
- LB_REG(mmLB_DATA_FORMAT));
-
- switch (get_reg_field_value(value, LB_DATA_FORMAT, PIXEL_DEPTH)) {
- case 0:
- *depth = LB_PIXEL_DEPTH_30BPP;
- break;
- case 1:
- *depth = LB_PIXEL_DEPTH_24BPP;
- break;
- case 2:
- *depth = LB_PIXEL_DEPTH_18BPP;
- break;
- case 3:
- *depth = LB_PIXEL_DEPTH_36BPP;
- break;
- default:
- dm_logger_write(xfm->ctx->logger, LOG_WARNING,
- "%s: Invalid LB pixel depth",
- __func__);
- *depth = LB_PIXEL_DEPTH_30BPP;
- break;
- }
- return true;
-
-}
-
static void set_denormalization(
struct dce80_transform *xfm80,
enum dc_color_depth depth)
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform_scl.c b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform_scl.c
index 140acc1993f3..130af10e030d 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform_scl.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform_scl.c
@@ -64,6 +64,20 @@ static void disable_enhanced_sharpness(struct dce80_transform *xfm80)
SCL_REG(mmSCL_F_SHARP_CONTROL), value);
}
+static void dce80_transform_set_scaler_bypass(
+ struct transform *xfm,
+ const struct scaler_data *scl_data)
+{
+ struct dce80_transform *xfm80 = TO_DCE80_TRANSFORM(xfm);
+ uint32_t sclv_mode;
+
+ disable_enhanced_sharpness(xfm80);
+
+ sclv_mode = dm_read_reg(xfm->ctx, SCL_REG(mmSCL_MODE));
+ set_reg_field_value(sclv_mode, 0, SCL_MODE, SCL_MODE);
+ dm_write_reg(xfm->ctx, SCL_REG(mmSCL_MODE), sclv_mode);
+}
+
/**
* Function:
* void setup_scaling_configuration
@@ -626,7 +640,7 @@ static void program_scl_ratios_inits(
dm_write_reg(xfm80->base.ctx, addr, value);
}
-bool dce80_transform_set_scaler(
+void dce80_transform_set_scaler(
struct transform *xfm,
const struct scaler_data *data)
{
@@ -668,7 +682,7 @@ bool dce80_transform_set_scaler(
if (!program_multi_taps_filter(xfm80, data, false)) {
dm_logger_write(ctx->logger, LOG_SCALER,
"Failed vertical taps programming\n");
- return false;
+ return;
}
} else
program_two_taps_filter(xfm80, true, true);
@@ -680,7 +694,7 @@ bool dce80_transform_set_scaler(
if (!program_multi_taps_filter(xfm80, data, true)) {
dm_logger_write(ctx->logger, LOG_SCALER,
"Failed horizontal taps programming\n");
- return false;
+ return;
}
} else
program_two_taps_filter(xfm80, true, false);
@@ -688,27 +702,4 @@ bool dce80_transform_set_scaler(
/* 7. Program the viewport */
program_viewport(xfm80, &data->viewport);
-
- return true;
-}
-
-void dce80_transform_set_scaler_bypass(
- struct transform *xfm,
- const struct scaler_data *scl_data)
-{
- struct dce80_transform *xfm80 = TO_DCE80_TRANSFORM(xfm);
- uint32_t sclv_mode;
-
- disable_enhanced_sharpness(xfm80);
-
- sclv_mode = dm_read_reg(xfm->ctx, SCL_REG(mmSCL_MODE));
- set_reg_field_value(sclv_mode, 0, SCL_MODE, SCL_MODE);
- dm_write_reg(xfm->ctx, SCL_REG(mmSCL_MODE), sclv_mode);
-}
-
-void dce80_transform_set_scaler_filter(
- struct transform *xfm,
- struct scaler_filter *filter)
-{
- xfm->filter = filter;
}
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/hw/transform.h b/drivers/gpu/drm/amd/dal/dc/inc/hw/transform.h
index 31547406aa31..94f4ef76921c 100644
--- a/drivers/gpu/drm/amd/dal/dc/inc/hw/transform.h
+++ b/drivers/gpu/drm/amd/dal/dc/inc/hw/transform.h
@@ -144,6 +144,14 @@ struct sharpness_adj {
uint32_t vert;
};
+struct line_buffer_params {
+ bool alpha_en;
+ bool pixel_expan_mode;
+ bool interleave_en;
+ uint32_t dynamic_pixel_depth;
+ enum lb_pixel_depth depth;
+};
+
struct scaler_data {
uint32_t h_active;
uint32_t v_active;
@@ -153,15 +161,7 @@ struct scaler_data {
struct scaling_ratios ratios;
struct sharpness_adj sharpness;
enum pixel_format format;
- enum lb_pixel_depth lb_bpp;
-};
-
-struct line_buffer_params {
- bool alpha_en;
- bool pixel_expan_mode;
- bool interleave_en;
- uint32_t dynamic_pixel_depth;
- enum lb_pixel_depth depth;
+ struct line_buffer_params lb_params;
};
struct transform_funcs {
@@ -171,16 +171,9 @@ struct transform_funcs {
bool (*transform_power_up)(
struct transform *xfm);
- bool (*transform_set_scaler)(
+ void (*transform_set_scaler)(
struct transform *xfm,
- const struct scaler_data *data);
-
- void (*transform_set_scaler_bypass)(
- struct transform *xfm, const struct scaler_data *scl_data);
-
- void (*transform_set_scaler_filter)(
- struct transform *xfm,
- struct scaler_filter *filter);
+ const struct scaler_data *scl_data);
void (*transform_set_gamut_remap)(
struct transform *xfm,
@@ -191,12 +184,6 @@ struct transform_funcs {
enum lb_pixel_depth depth,
const struct bit_depth_reduction_params *bit_depth_params);
- bool (*transform_get_current_pixel_storage_depth)(
- struct transform *xfm,
- enum lb_pixel_depth *depth);
-
- void (*transform_set_alpha)(struct transform *xfm, bool enable);
-
bool (*transform_get_optimal_number_of_taps)(
struct transform *xfm,
struct scaler_data *scl_data,
--
2.10.1
