Hi Dave,
More features for 4.10. Highlights:
- lots of code cleanup
- lots of bug fixes
- expose rpm based fan info via hwmon
- lots of clock and powergating fixes
- SI register header cleanup and conversion to common format used by newer asics
The following changes since commit d8c1abd968f1c880ad8ce4ecf7df55489f8c69a1:
Merge tag 'zxdrm-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into drm-next (2016-11-11 10:09:13 +1000)
are available in the git repository at:
git://people.freedesktop.org/~agd5f/linux drm-next-4.10
for you to fetch changes up to e7b8243d3e0ace9f5130c3b5c3c52a50039a7501:
drm/amdgpu: drop is_display_hung from display funcs (2016-11-23 15:13:21 -0500)
----------------------------------------------------------------
Alex Deucher (4):
drm/amdgpu/sdma: fix typo in packet setup
drm/amdgpu/uvd: consolidate code for fetching addr from ctx
drm/amdgpu/uvd: reduce IB parsing overhead on UVD5+ (v2)
drm/amdgpu: drop is_display_hung from display funcs
Christian König (7):
drm/amdgpu: disable the VRAM manager on special placements v2
drm/amdgpu: remove extra placement for AMDGPU_GEM_CREATE_NO_CPU_ACCESS
drm/amdgpu: remove amdgpu_irq_get_delayed
drm/amdgpu: fix amdgpu_fill_buffer (v2)
drm/amdgpu: fix error handling in amdgpu_bo_create_restricted
drm/amdgpu: improve AMDGPU_GEM_CREATE_VRAM_CLEARED handling (v2)
drm/amdgpu: use AMDGPU_GEM_CREATE_VRAM_CLEARED for VM PD/PTs (v2)
Edward O'Callaghan (2):
amdgpu: Use dev_err() over vanilla printk() in vm_decode_fault()
amdgpu: Wrap dev_err() calls on vm faults with printk_ratelimit()
Grazvydas Ignotas (2):
drm/amd/powerplay: export a function to read fan rpm
drm/amd/amdgpu: expose fan rpm though hwmon
Huang Rui (4):
drm/amdgpu: cleanup amdgpu_cs_ioctl to make code logicality clear
drm/amdgpu: remove amdgpu_cs_handle_lockup
drm/amdgpu: cleanup unused iterator members for sdma v3
drm/amdgpu: cleanup unused iterator members for sdma v2.4
Maruthi Srinivas Bayyavarapu (1):
drm/amdgpu: enable UVD clockgating in Polaris-10/11
Monk Liu (1):
drm/amdgpu:impl vgt_flush for VI(V5)
Ravikant B Sharma (1):
drm/amd/amdgpu : Fix NULL pointer comparison
Rex Zhu (18):
drm/amd/powerplay: add new bit mask to ctrl clock stretch feature.
drm/amd/powerplay: make CAC feature controlled by module parameter.
drm/amdgpu/powerplay: pp module only enable smu when dpm disabled.
drm/amd/powerplay: use mask bit for deepsleep/power tune feature.
drm/amdgpu: use mask bit for deep sleep feature on dpm.
drm/amdgpu: delete duplicate module parameter.
drm/amd/powerplay: fix code style
drm/amd/powerplay: enable voltage control by default for dgpu.
drm/amd/powerplay: delete duplicate code in smu7_hwmgr.c
drm/amdgpu: refine uvd_4.2 clock gate sequence.
drm/amdgpu: not set bypass mode for uvd5.0/uvd6.0
drm/amd/powerplay: partial revert commit 01b0e7fb1.
drm/amdgpu: refine uvd 5.0 clock gate feature.
drm/amd/powerplay: add mask bit for fan control mode.
drm/amdgpu: always un-gate UVD REGS path.
drm/amdgpu: change log level to KERN_INFO in ci_dpm.c
drm/amdgpu: refine cz uvd clock gate logic.
drm/amdgpu: enable uvd mgcg for Fiji.
Tom St Denis (8):
drm/amd/amdgpu: Clean up wave gfx7 helper
drm/amd/amdgpu: Clean up wave gfx8 helper
drm/amd/amdgpu: Introduction of SI registers (v2)
drm/amd/amdgpu: add SI defines/registers
drm/amd/amdgpu: port gfx6 over to new si headers (v2)
drm/amd/amdgpu: add wave reader to gfx v6
drm/amd/amdgpu: Port GMC v6 driver to new SI headers (v2)
drm/amd/amdgpu: port of DCE v6 to new headers (v3)
Trigger Huang (5):
drm/amdgpu: Add a ring type KIQ definition
drm/amdgpu:no gpu scheduler for KIQ
drm/amdgpu:bypass avfs event manager for sriov
drm/amd/powerplay:Tonga not to start SMC if SRIOV
drm/amdgpu: Disable DPM in virtualization
jimqu (1):
drm/amdgpu: fix logic error for checking amdgpu_vram_page_split
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_bios.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 43 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 7 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 14 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 39 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 9 -
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h | 3 -
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 2 -
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 47 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 21 +
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 6 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 69 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 43 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 99 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 2 +-
drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 12 +-
drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 8 +-
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 1 -
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 1 -
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 515 +-
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 1 -
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 6 -
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 770 +-
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 21 +-
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 23 +-
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 339 +-
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 18 +-
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 18 +-
drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 2 +-
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 4 +-
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 4 +-
drivers/gpu/drm/amd/amdgpu/si_enums.h | 272 +
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 42 +-
drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 113 +-
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 18 +-
drivers/gpu/drm/amd/amdgpu/vi.c | 7 +-
.../gpu/drm/amd/include/asic_reg/bif/bif_3_0_d.h | 661 +
.../drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h | 8127 ++++++++++++
.../gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h | 4457 +++++++
.../drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h | 9836 ++++++++++++++
.../gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h | 1784 +++
.../drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h | 12821 +++++++++++++++++++
.../gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_d.h | 1274 ++
.../drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h | 11895 +++++++++++++++++
.../gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h | 275 +
.../drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h | 1079 ++
.../gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h | 148 +
.../drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h | 715 ++
.../gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h | 96 +
.../drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h | 795 ++
.../gpu/drm/amd/include/asic_reg/vce/vce_1_0_d.h | 64 +
.../drm/amd/include/asic_reg/vce/vce_1_0_sh_mask.h | 99 +
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 72 +-
.../drm/amd/powerplay/hwmgr/cz_clockpowergating.c | 4 +-
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 31 +-
.../amd/powerplay/hwmgr/smu7_clockpowergating.c | 4 +-
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 14 +-
.../gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c | 5 +-
drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 3 +
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 6 +-
drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 6 +-
.../gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c | 3 +-
66 files changed, 55685 insertions(+), 1205 deletions(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu/si_enums.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_d.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_d.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_d.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/vce/vce_1_0_d.h
create mode 100644 drivers/gpu/drm/amd/include/asic_reg/vce/vce_1_0_sh_mask.h
