From: Tony Cheng <tony.cheng@xxxxxxx> - remove ASIC_DATA_VRAM_BITWIDTH. use asic_id directly - remove FEATURE_NO_HPD_LOW_POLLING_VCC_OFF. = 1 on all supported asic - remove FEATURE_DUMMY_FBC_BACKEND. = 0 on all asic - remove FEATURE_DISABLE_LPT_SUPPORT. = 0 on all asic - remove FEATURE_DISABLE_FBC_COMP_CLK_GATE. = 0 on all asic Signed-off-by: Tony Cheng <tony.cheng at amd.com> Acked-by: Harry Wentland <harry.wentland at amd.com> --- .../gpu/drm/amd/dal/dc/adapter/adapter_service.c | 20 ---------- .../amd/dal/dc/asic_capability/asic_capability.c | 2 - .../dc/asic_capability/carrizo_asic_capability.c | 1 - .../dc/asic_capability/hawaii_asic_capability.c | 1 - .../dc/asic_capability/polaris10_asic_capability.c | 1 - .../dal/dc/asic_capability/tonga_asic_capability.c | 1 - drivers/gpu/drm/amd/dal/dc/core/dc.c | 3 +- drivers/gpu/drm/amd/dal/dc/dc_types.h | 45 +++++++++++----------- drivers/gpu/drm/amd/dal/dc/dce/dce_link_encoder.c | 3 +- .../gpu/drm/amd/dal/dc/dce110/dce110_compressor.c | 15 ++------ .../gpu/drm/amd/dal/dc/dce110/dce110_resource.c | 2 +- .../gpu/drm/amd/dal/dc/dce112/dce112_compressor.c | 15 ++------ .../gpu/drm/amd/dal/dc/dce112/dce112_resource.c | 2 +- .../gpu/drm/amd/dal/dc/dce80/dce80_compressor.c | 15 ++------ drivers/gpu/drm/amd/dal/dc/inc/core_dc.h | 1 - .../amd/dal/include/adapter_service_interface.h | 16 +------- .../drm/amd/dal/include/asic_capability_types.h | 2 - 17 files changed, 40 insertions(+), 105 deletions(-) diff --git a/drivers/gpu/drm/amd/dal/dc/adapter/adapter_service.c b/drivers/gpu/drm/amd/dal/dc/adapter/adapter_service.c index 21fd3249b0c1..e6a5bd08d997 100644 --- a/drivers/gpu/drm/amd/dal/dc/adapter/adapter_service.c +++ b/drivers/gpu/drm/amd/dal/dc/adapter/adapter_service.c @@ -94,13 +94,11 @@ static const struct feature_source_entry feature_entry_table[] = { {FEATURE_DCP_BIT_DEPTH_REDUCTION_MODE, 0, false}, {FEATURE_DCP_DITHER_MODE, 0, false}, {FEATURE_DCP_PROGRAMMING_WA, 0, false}, - {FEATURE_NO_HPD_LOW_POLLING_VCC_OFF, false, true}, {FEATURE_ENABLE_DFS_BYPASS, false, true}, {FEATURE_WIRELESS_FULL_TIMING_ADJUSTMENT, false, true}, {FEATURE_WIRELESS_LIMIT_720P, false, true}, {FEATURE_MODIFY_TIMINGS_FOR_WIRELESS, false, true}, {FEATURE_DETECT_REQUIRE_HPD_HIGH, false, true}, - {FEATURE_NO_HPD_LOW_POLLING_VCC_OFF, false, true}, {FEATURE_LB_HIGH_RESOLUTION, false, true}, {FEATURE_MAX_CONTROLLER_NUM, 0, false}, {FEATURE_DRR_SUPPORT, AS_DRR_SUPPORT_ENABLED, false}, @@ -154,10 +152,7 @@ static const struct feature_source_entry feature_entry_table[] = { {FEATURE_ALLOW_DIRECT_MEMORY_ACCESS_TRIG, false, true}, {FEATURE_FORCE_STATIC_SCREEN_EVENT_TRIGGERS, 0, false}, {FEATURE_USE_PPLIB, true, true}, - {FEATURE_DISABLE_LPT_SUPPORT, false, true}, - {FEATURE_DUMMY_FBC_BACKEND, false, true}, {FEATURE_DPMS_AUDIO_ENDPOINT_CONTROL, true, true}, - {FEATURE_DISABLE_FBC_COMP_CLK_GATE, false, true}, {FEATURE_PIXEL_PERFECT_OUTPUT, false, true}, {FEATURE_8BPP_SUPPORTED, false, true}, }; @@ -367,10 +362,6 @@ static bool get_feature_value_from_data_sources( *data = as->asic_cap->caps.HPD_CHECK_FOR_EDID; break; - case FEATURE_NO_HPD_LOW_POLLING_VCC_OFF: - *data = as->asic_cap->caps.NO_VCC_OFF_HPD_POLLING; - break; - case FEATURE_STUTTER_MODE: *data = as->asic_cap->data[ASIC_DATA_STUTTERMODE]; break; @@ -674,17 +665,6 @@ bool dal_adapter_service_is_dfs_bypass_enabled( return false; } -/* - * dal_adapter_service_get_asic_vram_bit_width - * - * Get the video RAM bit width set on the ASIC - */ -uint32_t dal_adapter_service_get_asic_vram_bit_width( - struct adapter_service *as) -{ - return as->asic_cap->data[ASIC_DATA_VRAM_BITWIDTH]; -} - struct dal_asic_runtime_flags dal_adapter_service_get_asic_runtime_flags( struct adapter_service *as) { diff --git a/drivers/gpu/drm/amd/dal/dc/asic_capability/asic_capability.c b/drivers/gpu/drm/amd/dal/dc/asic_capability/asic_capability.c index 543fee50c21a..5d50455ca0d8 100644 --- a/drivers/gpu/drm/amd/dal/dc/asic_capability/asic_capability.c +++ b/drivers/gpu/drm/amd/dal/dc/asic_capability/asic_capability.c @@ -54,7 +54,6 @@ static bool construct( memset(cap->data, 0, sizeof(cap->data)); /* ASIC data */ - cap->data[ASIC_DATA_VRAM_BITWIDTH] = init->vram_width; cap->runtime_flags = init->runtime_flags; cap->data[ASIC_DATA_MAX_UNDERSCAN_PERCENTAGE] = 10; cap->data[ASIC_DATA_VIEWPORT_PIXEL_GRANULARITY] = 4; @@ -71,7 +70,6 @@ static bool construct( cap->caps.WIRELESS_COMPRESSED_AUDIO = false; cap->caps.VCE_SUPPORTED = false; cap->caps.HPD_CHECK_FOR_EDID = false; - cap->caps.NO_VCC_OFF_HPD_POLLING = false; cap->caps.NEED_MC_TUNING = false; cap->caps.SUPPORT_8BPP = true; diff --git a/drivers/gpu/drm/amd/dal/dc/asic_capability/carrizo_asic_capability.c b/drivers/gpu/drm/amd/dal/dc/asic_capability/carrizo_asic_capability.c index 982d1cd5bad9..90050e8856dd 100644 --- a/drivers/gpu/drm/amd/dal/dc/asic_capability/carrizo_asic_capability.c +++ b/drivers/gpu/drm/amd/dal/dc/asic_capability/carrizo_asic_capability.c @@ -63,7 +63,6 @@ void carrizo_asic_capability_create(struct asic_capability *cap, cap->caps.DP_MST_SUPPORTED = true; cap->caps.PANEL_SELF_REFRESH_SUPPORTED = true; cap->caps.MIRABILIS_SUPPORTED = true; - cap->caps.NO_VCC_OFF_HPD_POLLING = true; cap->caps.VCE_SUPPORTED = true; cap->caps.HPD_CHECK_FOR_EDID = true; cap->caps.DFSBYPASS_DYNAMIC_SUPPORT = true; diff --git a/drivers/gpu/drm/amd/dal/dc/asic_capability/hawaii_asic_capability.c b/drivers/gpu/drm/amd/dal/dc/asic_capability/hawaii_asic_capability.c index 628f985acf23..f5a3cda8c5b3 100644 --- a/drivers/gpu/drm/amd/dal/dc/asic_capability/hawaii_asic_capability.c +++ b/drivers/gpu/drm/amd/dal/dc/asic_capability/hawaii_asic_capability.c @@ -111,7 +111,6 @@ void dal_hawaii_asic_capability_create(struct asic_capability *cap, cap->caps.HEADLESS_NO_OPM_SUPPORTED = true; cap->caps.HPD_CHECK_FOR_EDID = true; - cap->caps.NO_VCC_OFF_HPD_POLLING = true; /* true will hang the system! */ cap->caps.DFSBYPASS_DYNAMIC_SUPPORT = false; diff --git a/drivers/gpu/drm/amd/dal/dc/asic_capability/polaris10_asic_capability.c b/drivers/gpu/drm/amd/dal/dc/asic_capability/polaris10_asic_capability.c index 1b1524b2e6e4..89bb01f436b9 100644 --- a/drivers/gpu/drm/amd/dal/dc/asic_capability/polaris10_asic_capability.c +++ b/drivers/gpu/drm/amd/dal/dc/asic_capability/polaris10_asic_capability.c @@ -66,7 +66,6 @@ void polaris10_asic_capability_create(struct asic_capability *cap, cap->caps.DP_MST_SUPPORTED = true; cap->caps.PANEL_SELF_REFRESH_SUPPORTED = true; cap->caps.MIRABILIS_SUPPORTED = true; - cap->caps.NO_VCC_OFF_HPD_POLLING = true; cap->caps.VCE_SUPPORTED = true; cap->caps.HPD_CHECK_FOR_EDID = true; cap->caps.DFSBYPASS_DYNAMIC_SUPPORT = true; diff --git a/drivers/gpu/drm/amd/dal/dc/asic_capability/tonga_asic_capability.c b/drivers/gpu/drm/amd/dal/dc/asic_capability/tonga_asic_capability.c index 58d4913e3aea..aa2333f9dc07 100644 --- a/drivers/gpu/drm/amd/dal/dc/asic_capability/tonga_asic_capability.c +++ b/drivers/gpu/drm/amd/dal/dc/asic_capability/tonga_asic_capability.c @@ -64,7 +64,6 @@ void tonga_asic_capability_create(struct asic_capability *cap, cap->caps.DP_MST_SUPPORTED = true; cap->caps.PANEL_SELF_REFRESH_SUPPORTED = true; cap->caps.MIRABILIS_SUPPORTED = true; - cap->caps.NO_VCC_OFF_HPD_POLLING = true; cap->caps.VCE_SUPPORTED = true; cap->caps.HPD_CHECK_FOR_EDID = true; cap->caps.DFSBYPASS_DYNAMIC_SUPPORT = true; diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc.c b/drivers/gpu/drm/amd/dal/dc/core/dc.c index cfc8e8f95d5b..994b91967ad8 100644 --- a/drivers/gpu/drm/amd/dal/dc/core/dc.c +++ b/drivers/gpu/drm/amd/dal/dc/core/dc.c @@ -535,8 +535,7 @@ static bool construct(struct core_dc *dc, dc_ctx->cgs_device = init_params->cgs_device; dc_ctx->driver_context = init_params->driver; dc_ctx->dc = &dc->public; - - dc->asic_id = init_params->asic_id; + dc_ctx->asic_id = init_params->asic_id; /* Create logger */ logger = dal_logger_create(dc_ctx); diff --git a/drivers/gpu/drm/amd/dal/dc/dc_types.h b/drivers/gpu/drm/amd/dal/dc/dc_types.h index 30e12e5cbe1b..933fa668da1b 100644 --- a/drivers/gpu/drm/amd/dal/dc/dc_types.h +++ b/drivers/gpu/drm/amd/dal/dc/dc_types.h @@ -62,28 +62,6 @@ enum dce_environment { (IS_FPGA_MAXIMUS_DC(dce_environment) || (dce_environment == DCE_ENV_DIAG)) /********************************/ - -struct dc_context { - struct dc *dc; - - void *driver_context; /* e.g. amdgpu_device */ - - struct dal_logger *logger; - void *cgs_device; - - enum dce_environment dce_environment; - - /* todo: below should probably move to dc. to facilitate removal - * of AS we will store these here - */ - enum dce_version dce_version; - struct dc_bios *dc_bios; - bool created_bios; - struct gpio_service *gpio_service; - struct i2caux *i2caux; - struct adapter_service *adapter_srv; -}; - /* * ASIC Runtime Flags */ @@ -121,6 +99,29 @@ struct hw_asic_id { void *atombios_base_address; }; +struct dc_context { + struct dc *dc; + + void *driver_context; /* e.g. amdgpu_device */ + + struct dal_logger *logger; + void *cgs_device; + + enum dce_environment dce_environment; + struct hw_asic_id asic_id; + + /* todo: below should probably move to dc. to facilitate removal + * of AS we will store these here + */ + enum dce_version dce_version; + struct dc_bios *dc_bios; + bool created_bios; + struct gpio_service *gpio_service; + struct i2caux *i2caux; + struct adapter_service *adapter_srv; +}; + + #define MAX_EDID_BUFFER_SIZE 512 #define EDID_BLOCK_SIZE 128 #define MAX_SURFACE_NUM 2 diff --git a/drivers/gpu/drm/amd/dal/dc/dce/dce_link_encoder.c b/drivers/gpu/drm/amd/dal/dc/dce/dce_link_encoder.c index bc444438ec95..1002187b0063 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce/dce_link_encoder.c +++ b/drivers/gpu/drm/amd/dal/dc/dce/dce_link_encoder.c @@ -610,8 +610,7 @@ static void link_encoder_edp_wait_for_hpd_ready( return; } - if (!power_up && dal_adapter_service_is_feature_supported(as, - FEATURE_NO_HPD_LOW_POLLING_VCC_OFF)) + if (!power_up) /* from KV, we will not HPD low after turning off VCC - * instead, we will check the SW timer in power_up(). */ return; diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_compressor.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_compressor.c index 62bf70363b3c..186ce3a9fe94 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_compressor.c +++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_compressor.c @@ -799,29 +799,22 @@ bool dce110_compressor_construct(struct dce110_compressor *compressor, struct embedded_panel_info panel_info; compressor->base.options.bits.FBC_SUPPORT = true; - if (!(dal_adapter_service_is_feature_supported(as, - FEATURE_DISABLE_LPT_SUPPORT))) - compressor->base.options.bits.LPT_SUPPORT = true; + compressor->base.options.bits.LPT_SUPPORT = true; /* For DCE 11 always use one DRAM channel for LPT */ compressor->base.lpt_channels_num = 1; - - if (dal_adapter_service_is_feature_supported(as, FEATURE_DUMMY_FBC_BACKEND)) - compressor->base.options.bits.DUMMY_BACKEND = true; + compressor->base.options.bits.DUMMY_BACKEND = false; /* Check if this system has more than 1 DRAM channel; if only 1 then LPT * should not be supported */ if (compressor->base.memory_bus_width == 64) compressor->base.options.bits.LPT_SUPPORT = false; - if (dal_adapter_service_is_feature_supported(as, - FEATURE_DISABLE_FBC_COMP_CLK_GATE)) - compressor->base.options.bits.CLK_GATING_DISABLED = true; + compressor->base.options.bits.CLK_GATING_DISABLED = false; compressor->base.ctx = ctx; compressor->base.embedded_panel_h_size = 0; compressor->base.embedded_panel_v_size = 0; - compressor->base.memory_bus_width = - dal_adapter_service_get_asic_vram_bit_width(as); + compressor->base.memory_bus_width = ctx->asic_id.vram_width; compressor->base.allocated_size = 0; compressor->base.preferred_requested_size = 0; compressor->base.min_compress_ratio = FBC_COMPRESS_RATIO_INVALID; diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c index 0ed9b831811d..a924ed0faea6 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c +++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c @@ -1191,7 +1191,7 @@ static bool construct( ctx->dc_bios->regs = &bios_regs; pool->base.adapter_srv = as; - pool->base.res_cap = dce110_resource_cap(&dc->asic_id); + pool->base.res_cap = dce110_resource_cap(&ctx->asic_id); pool->base.funcs = &dce110_res_pool_funcs; /************************************************* diff --git a/drivers/gpu/drm/amd/dal/dc/dce112/dce112_compressor.c b/drivers/gpu/drm/amd/dal/dc/dce112/dce112_compressor.c index aa06777306f8..e34779b4b1de 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce112/dce112_compressor.c +++ b/drivers/gpu/drm/amd/dal/dc/dce112/dce112_compressor.c @@ -799,29 +799,22 @@ bool dce112_compressor_construct(struct dce112_compressor *compressor, struct embedded_panel_info panel_info; compressor->base.options.bits.FBC_SUPPORT = true; - if (!(dal_adapter_service_is_feature_supported(as, - FEATURE_DISABLE_LPT_SUPPORT))) - compressor->base.options.bits.LPT_SUPPORT = true; + compressor->base.options.bits.LPT_SUPPORT = true; /* For DCE 11 always use one DRAM channel for LPT */ compressor->base.lpt_channels_num = 1; - - if (dal_adapter_service_is_feature_supported(as, FEATURE_DUMMY_FBC_BACKEND)) - compressor->base.options.bits.DUMMY_BACKEND = true; + compressor->base.options.bits.DUMMY_BACKEND = false; /* Check if this system has more than 1 DRAM channel; if only 1 then LPT * should not be supported */ if (compressor->base.memory_bus_width == 64) compressor->base.options.bits.LPT_SUPPORT = false; - if (dal_adapter_service_is_feature_supported(as, - FEATURE_DISABLE_FBC_COMP_CLK_GATE)) - compressor->base.options.bits.CLK_GATING_DISABLED = true; + compressor->base.options.bits.CLK_GATING_DISABLED = false; compressor->base.ctx = ctx; compressor->base.embedded_panel_h_size = 0; compressor->base.embedded_panel_v_size = 0; - compressor->base.memory_bus_width = - dal_adapter_service_get_asic_vram_bit_width(as); + compressor->base.memory_bus_width = ctx->asic_id.vram_width; compressor->base.allocated_size = 0; compressor->base.preferred_requested_size = 0; compressor->base.min_compress_ratio = FBC_COMPRESS_RATIO_INVALID; diff --git a/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c index 7cd772dbd7ce..0ab589f1c1a7 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c +++ b/drivers/gpu/drm/amd/dal/dc/dce112/dce112_resource.c @@ -1202,7 +1202,7 @@ static bool construct( ctx->dc_bios->regs = &bios_regs; pool->base.adapter_srv = adapter_serv; - pool->base.res_cap = dce112_resource_cap(&dc->asic_id); + pool->base.res_cap = dce112_resource_cap(&ctx->asic_id); pool->base.funcs = &dce112_res_pool_funcs; /************************************************* diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_compressor.c b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_compressor.c index 8cab5e60bc9b..bcd44ebafc36 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_compressor.c +++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_compressor.c @@ -780,29 +780,22 @@ bool dce80_compressor_construct(struct dce80_compressor *compressor, struct embedded_panel_info panel_info; compressor->base.options.bits.FBC_SUPPORT = true; - if (!(dal_adapter_service_is_feature_supported(as, - FEATURE_DISABLE_LPT_SUPPORT))) - compressor->base.options.bits.LPT_SUPPORT = true; + compressor->base.options.bits.LPT_SUPPORT = true; /* For DCE 11 always use one DRAM channel for LPT */ compressor->base.lpt_channels_num = 1; - - if (dal_adapter_service_is_feature_supported(as, FEATURE_DUMMY_FBC_BACKEND)) - compressor->base.options.bits.DUMMY_BACKEND = true; + compressor->base.options.bits.DUMMY_BACKEND = false; /* Check if this system has more than 1 DRAM channel; if only 1 then LPT * should not be supported */ if (compressor->base.memory_bus_width == 64) compressor->base.options.bits.LPT_SUPPORT = false; - if (dal_adapter_service_is_feature_supported(as, - FEATURE_DISABLE_FBC_COMP_CLK_GATE)) - compressor->base.options.bits.CLK_GATING_DISABLED = true; + compressor->base.options.bits.CLK_GATING_DISABLED = false; compressor->base.ctx = ctx; compressor->base.embedded_panel_h_size = 0; compressor->base.embedded_panel_v_size = 0; - compressor->base.memory_bus_width = - dal_adapter_service_get_asic_vram_bit_width(as); + compressor->base.memory_bus_width = ctx->asic_id.vram_width; compressor->base.allocated_size = 0; compressor->base.preferred_requested_size = 0; compressor->base.min_compress_ratio = FBC_COMPRESS_RATIO_INVALID; diff --git a/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h b/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h index 668e6c826090..826ae7a8998f 100644 --- a/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h +++ b/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h @@ -17,7 +17,6 @@ struct core_dc { struct dc public; struct dc_context *ctx; - struct hw_asic_id asic_id; uint8_t link_count; struct core_link *links[MAX_PIPES * 2]; diff --git a/drivers/gpu/drm/amd/dal/include/adapter_service_interface.h b/drivers/gpu/drm/amd/dal/include/adapter_service_interface.h index bb4964743a4d..eee36b421950 100644 --- a/drivers/gpu/drm/amd/dal/include/adapter_service_interface.h +++ b/drivers/gpu/drm/amd/dal/include/adapter_service_interface.h @@ -80,7 +80,6 @@ enum adapter_feature_id { FEATURE_ALLOW_EDP_RESOURCE_SHARING, FEATURE_SUPPORT_DP_YUV, FEATURE_SUPPORT_DP_Y_ONLY, - FEATURE_NO_HPD_LOW_POLLING_VCC_OFF, /* 20th */ FEATURE_ENABLE_DFS_BYPASS, FEATURE_LB_HIGH_RESOLUTION, FEATURE_DP_DISPLAY_FORCE_SS_ENABLE, @@ -166,9 +165,6 @@ enum adapter_feature_id { FEATURE_POWER_GATING_PIPE_IN_TILE = FEATURE_SET_12_END + 1, FEATURE_SET_13_START = FEATURE_POWER_GATING_PIPE_IN_TILE, FEATURE_USE_PPLIB, - FEATURE_DISABLE_LPT_SUPPORT, - FEATURE_DUMMY_FBC_BACKEND, - FEATURE_DISABLE_FBC_COMP_CLK_GATE, FEATURE_DPMS_AUDIO_ENDPOINT_CONTROL, FEATURE_PIXEL_PERFECT_OUTPUT, FEATURE_8BPP_SUPPORTED, @@ -315,6 +311,7 @@ enum as_drr_support { struct as_init_data { struct hw_asic_id hw_init_data; struct dc_context *ctx; + const struct dal_override_parameters *display_param; struct dc_bios *vbios_override; enum dce_environment dce_environment; }; @@ -330,11 +327,6 @@ void dal_adapter_service_destroy( /* Check if DFS bypass is enabled */ bool dal_adapter_service_is_dfs_bypass_enabled(struct adapter_service *as); - -/* Get the video RAM bit width set on the ASIC */ -uint32_t dal_adapter_service_get_asic_vram_bit_width( - struct adapter_service *as); - /* Return if a given feature is supported by the ASIC */ bool dal_adapter_service_is_feature_supported(struct adapter_service *as, enum adapter_feature_id feature_id); @@ -345,12 +337,6 @@ bool dal_adapter_service_get_feature_value(struct adapter_service *as, void *data, uint32_t size); -/* Get I2C information from BIOS */ -bool dal_adapter_service_get_i2c_info( - struct adapter_service *as, - struct graphics_object_id id, - struct graphics_object_i2c_info *i2c_info); - struct dal_asic_runtime_flags dal_adapter_service_get_asic_runtime_flags( struct adapter_service *as); diff --git a/drivers/gpu/drm/amd/dal/include/asic_capability_types.h b/drivers/gpu/drm/amd/dal/include/asic_capability_types.h index 8c6c40247e02..b0915e7f7048 100644 --- a/drivers/gpu/drm/amd/dal/include/asic_capability_types.h +++ b/drivers/gpu/drm/amd/dal/include/asic_capability_types.h @@ -48,7 +48,6 @@ struct asic_caps { bool WIRELESS_COMPRESSED_AUDIO:1; bool VCE_SUPPORTED:1; bool HPD_CHECK_FOR_EDID:1; - bool NO_VCC_OFF_HPD_POLLING:1; bool NEED_MC_TUNING:1; bool SKIP_PSR_WAIT_FOR_PLL_LOCK_BIT:1; bool DFSBYPASS_DYNAMIC_SUPPORT:1; @@ -86,7 +85,6 @@ enum asic_data { ASIC_DATA_FIRST = 0, ASIC_DATA_DCE_VERSION = ASIC_DATA_FIRST, ASIC_DATA_DCE_VERSION_MINOR, - ASIC_DATA_VRAM_BITWIDTH, ASIC_DATA_LINEBUFFER_SIZE, ASIC_DATA_DRAM_BANDWIDTH_EFFICIENCY, ASIC_DATA_MC_LATENCY, -- 2.10.1