[PATCH 17/76] drm/amd/dal: Remove adapter service from display clock

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From: Zeyu Fan <Zeyu.Fan@xxxxxxx>

Signed-off-by: Zeyu Fan <Zeyu.Fan at amd.com>
Acked-by: Harry Wentland <harry.wentland at amd.com>
---
 .../amd/dal/dc/gpu/dce110/display_clock_dce110.c   |  2 +-
 .../amd/dal/dc/gpu/dce112/display_clock_dce112.c   | 35 ++++++++--------------
 .../amd/dal/dc/gpu/dce112/display_clock_dce112.h   |  3 +-
 .../drm/amd/dal/dc/gpu/dce80/display_clock_dce80.c |  2 +-
 drivers/gpu/drm/amd/dal/dc/gpu/display_clock.c     |  4 +--
 drivers/gpu/drm/amd/dal/dc/gpu/display_clock.h     |  3 +-
 6 files changed, 18 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/amd/dal/dc/gpu/dce110/display_clock_dce110.c b/drivers/gpu/drm/amd/dal/dc/gpu/dce110/display_clock_dce110.c
index 024972ee0242..d422294715ce 100644
--- a/drivers/gpu/drm/amd/dal/dc/gpu/dce110/display_clock_dce110.c
+++ b/drivers/gpu/drm/amd/dal/dc/gpu/dce110/display_clock_dce110.c
@@ -929,7 +929,7 @@ static bool dal_display_clock_dce110_construct(
 	if (NULL == as)
 		return false;
 
-	if (!dal_display_clock_construct_base(dc_base, ctx, as))
+	if (!dal_display_clock_construct_base(dc_base, ctx))
 		return false;
 
 	dc_base->funcs = &funcs;
diff --git a/drivers/gpu/drm/amd/dal/dc/gpu/dce112/display_clock_dce112.c b/drivers/gpu/drm/amd/dal/dc/gpu/dce112/display_clock_dce112.c
index 73f30ddf2d52..f94da476c9a5 100644
--- a/drivers/gpu/drm/amd/dal/dc/gpu/dce112/display_clock_dce112.c
+++ b/drivers/gpu/drm/amd/dal/dc/gpu/dce112/display_clock_dce112.c
@@ -644,8 +644,7 @@ uint32_t dispclk_dce112_calculate_min_clock(
 }
 
 static bool display_clock_integrated_info_construct(
-	struct display_clock_dce112 *disp_clk,
-	struct adapter_service *as)
+	struct display_clock_dce112 *disp_clk)
 {
 	struct integrated_info info;
 	uint32_t i;
@@ -696,11 +695,6 @@ static bool display_clock_integrated_info_construct(
 				info.disp_clk_voltage[i].max_supported_clk;
 		}
 	}
-	disp_clk->dfs_bypass_enabled =
-		dal_adapter_service_is_dfs_bypass_enabled(as);
-	disp_clk->use_max_disp_clk =
-		dal_adapter_service_is_feature_supported(as,
-			FEATURE_USE_MAX_DISPLAY_CLK);
 
 	return true;
 }
@@ -847,23 +841,22 @@ static const struct display_clock_funcs funcs = {
 
 bool dal_display_clock_dce112_construct(
 	struct display_clock_dce112 *dc112,
-	struct dc_context *ctx,
-	struct adapter_service *as)
+	struct dc_context *ctx)
 {
 	struct dm_pp_static_clock_info *static_clk_info = {0};
 	struct display_clock *dc_base = &dc112->disp_clk_base;
 
-	if (NULL == as)
-		return false;
+	/*if (NULL == as)
+		return false;*/
 
-	if (!dal_display_clock_construct_base(dc_base, ctx, as))
+	if (!dal_display_clock_construct_base(dc_base, ctx))
 		return false;
 
 	dc_base->funcs = &funcs;
 
 	dc112->dfs_bypass_disp_clk = 0;
 
-	if (!display_clock_integrated_info_construct(dc112, as))
+	if (!display_clock_integrated_info_construct(dc112))
 		dm_logger_write(dc_base->ctx->logger, LOG_WARNING,
 			"Cannot obtain VBIOS integrated info\n");
 
@@ -907,9 +900,8 @@ bool dal_display_clock_dce112_construct(
 
 	{
 		uint32_t ss_info_num =
-			dal_adapter_service_get_ss_info_num(
-				as,
-				AS_SIGNAL_TYPE_GPU_PLL);
+			ctx->dc_bios->funcs->
+			get_ss_entry_number(ctx->dc_bios, AS_SIGNAL_TYPE_GPU_PLL);
 
 		if (ss_info_num) {
 			struct spread_spectrum_info info;
@@ -918,11 +910,10 @@ bool dal_display_clock_dce112_construct(
 			memset(&info, 0, sizeof(info));
 
 			result =
-				dal_adapter_service_get_ss_info(
-					as,
-					AS_SIGNAL_TYPE_GPU_PLL,
-					0,
-					&info);
+					(BP_RESULT_OK == ctx->dc_bios->funcs->
+					get_spread_spectrum_info(ctx->dc_bios,
+					AS_SIGNAL_TYPE_GPU_PLL, 0, &info)) ? true : false;
+
 
 			/* Based on VBIOS, VBIOS will keep entry for GPU PLL SS
 			 * even if SS not enabled and in that case
@@ -967,7 +958,7 @@ struct display_clock *dal_display_clock_dce112_create(
 	if (dc112 == NULL)
 		return NULL;
 
-	if (dal_display_clock_dce112_construct(dc112, ctx, as))
+	if (dal_display_clock_dce112_construct(dc112, ctx))
 		return &dc112->disp_clk_base;
 
 	dm_free(dc112);
diff --git a/drivers/gpu/drm/amd/dal/dc/gpu/dce112/display_clock_dce112.h b/drivers/gpu/drm/amd/dal/dc/gpu/dce112/display_clock_dce112.h
index 88b9214bd1b8..937e17929b7c 100644
--- a/drivers/gpu/drm/amd/dal/dc/gpu/dce112/display_clock_dce112.h
+++ b/drivers/gpu/drm/amd/dal/dc/gpu/dce112/display_clock_dce112.h
@@ -71,8 +71,7 @@ enum divider_range_start {
 
 bool dal_display_clock_dce112_construct(
 	struct display_clock_dce112 *dc112,
-	struct dc_context *ctx,
-	struct adapter_service *as);
+	struct dc_context *ctx);
 
 void dispclk_dce112_destroy(struct display_clock **base);
 
diff --git a/drivers/gpu/drm/amd/dal/dc/gpu/dce80/display_clock_dce80.c b/drivers/gpu/drm/amd/dal/dc/gpu/dce80/display_clock_dce80.c
index 6c5c656c0166..e37b397bbd9f 100644
--- a/drivers/gpu/drm/amd/dal/dc/gpu/dce80/display_clock_dce80.c
+++ b/drivers/gpu/drm/amd/dal/dc/gpu/dce80/display_clock_dce80.c
@@ -860,7 +860,7 @@ static bool display_clock_construct(
 	if (NULL == as)
 		return false;
 
-	if (!dal_display_clock_construct_base(dc_base, ctx, as))
+	if (!dal_display_clock_construct_base(dc_base, ctx))
 		return false;
 
 	dc_base->funcs = &funcs;
diff --git a/drivers/gpu/drm/amd/dal/dc/gpu/display_clock.c b/drivers/gpu/drm/amd/dal/dc/gpu/display_clock.c
index 47734e551c2f..08586fb3d18a 100644
--- a/drivers/gpu/drm/amd/dal/dc/gpu/display_clock.c
+++ b/drivers/gpu/drm/amd/dal/dc/gpu/display_clock.c
@@ -56,13 +56,11 @@ uint32_t dal_display_clock_base_get_dfs_bypass_threshold(
 
 bool dal_display_clock_construct_base(
 	struct display_clock *base,
-	struct dc_context *ctx,
-	struct adapter_service *as)
+	struct dc_context *ctx)
 {
 	base->ctx = ctx;
 	base->id = CLOCK_SOURCE_ID_DCPLL;
 	base->min_display_clk_threshold_khz = 0;
-	base->as = as;
 
 /* Initially set current min clocks state to invalid since we
  * cannot make any assumption about PPLIB's initial state. This will be updated
diff --git a/drivers/gpu/drm/amd/dal/dc/gpu/display_clock.h b/drivers/gpu/drm/amd/dal/dc/gpu/display_clock.h
index 52662b3919b1..18b79fd3fcb8 100644
--- a/drivers/gpu/drm/amd/dal/dc/gpu/display_clock.h
+++ b/drivers/gpu/drm/amd/dal/dc/gpu/display_clock.h
@@ -78,8 +78,7 @@ void dal_display_clock_base_set_clock_state(struct display_clock *disp_clk,
 	struct display_clock_state clk_state);
 bool dal_display_clock_construct_base(
 	struct display_clock *base,
-	struct dc_context *ctx,
-	struct adapter_service *as);
+	struct dc_context *ctx);
 
 uint32_t dal_display_clock_get_validation_clock(struct display_clock *disp_clk);
 
-- 
2.10.1



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