[PATCH 11/76] drm/amd/dal: Refactor i2c_hw_engine

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From: Andrey Grodzovsky <Andrey.Grodzovsky@xxxxxxx>

Pass dce110_i2c_hw_engine_registers as parameter.
Fixup hw_engine regs set. asssign registers array starting from element 0 and not 1

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky at amd.com>
Acked-by: Harry Wentland <harry.wentland at amd.com>
---
 .../drm/amd/dal/dc/i2caux/dce100/i2caux_dce100.c   | 22 ++++++++-
 .../drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.c   | 14 ++++--
 .../drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.h   |  4 +-
 .../drm/amd/dal/dc/i2caux/dce112/i2caux_dce112.c   | 52 +++-------------------
 4 files changed, 40 insertions(+), 52 deletions(-)

diff --git a/drivers/gpu/drm/amd/dal/dc/i2caux/dce100/i2caux_dce100.c b/drivers/gpu/drm/amd/dal/dc/i2caux/dce100/i2caux_dce100.c
index 917896fa1bce..e3ababdfe7aa 100644
--- a/drivers/gpu/drm/amd/dal/dc/i2caux/dce100/i2caux_dce100.c
+++ b/drivers/gpu/drm/amd/dal/dc/i2caux/dce100/i2caux_dce100.c
@@ -33,6 +33,7 @@
 #include "../i2c_hw_engine.h"
 
 #include "../dce110/aux_engine_dce110.h"
+#include "../dce110/i2c_hw_engine_dce110.h"
 #include "../dce110/i2caux_dce110.h"
 
 #include "dce/dce_10_0_d.h"
@@ -52,6 +53,11 @@
 	.AUX_RESET_MASK = 0 \
 }
 
+#define hw_engine_regs(id)\
+{\
+		I2C_HW_ENGINE_COMMON_REG_LIST(id) \
+}
+
 static const struct dce110_aux_registers dce100_aux_regs[] = {
 		aux_regs(0),
 		aux_regs(1),
@@ -61,6 +67,15 @@ static const struct dce110_aux_registers dce100_aux_regs[] = {
 		aux_regs(5),
 };
 
+static const struct dce110_i2c_hw_engine_registers dce100_hw_engine_regs[] = {
+		hw_engine_regs(1),
+		hw_engine_regs(2),
+		hw_engine_regs(3),
+		hw_engine_regs(4),
+		hw_engine_regs(5),
+		hw_engine_regs(6)
+};
+
 struct i2caux *dal_i2caux_dce100_create(
 	struct adapter_service *as,
 	struct dc_context *ctx)
@@ -73,7 +88,12 @@ struct i2caux *dal_i2caux_dce100_create(
 		return NULL;
 	}
 
-	if (dal_i2caux_dce110_construct(i2caux_dce110, as, ctx, dce100_aux_regs))
+	if (dal_i2caux_dce110_construct(
+			i2caux_dce110,
+			as,
+			ctx,
+			dce100_aux_regs,
+			dce100_hw_engine_regs))
 		return &i2caux_dce110->base;
 
 	ASSERT_CRITICAL(false);
diff --git a/drivers/gpu/drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.c b/drivers/gpu/drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.c
index 650474bbdcb5..566056b6782f 100644
--- a/drivers/gpu/drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.c
+++ b/drivers/gpu/drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.c
@@ -166,7 +166,7 @@ static const struct i2caux_funcs i2caux_funcs = {
 }
 
 #define hw_engine_regs(id)\
-[id] = {\
+{\
 		I2C_HW_ENGINE_COMMON_REG_LIST(id) \
 }
 
@@ -192,7 +192,8 @@ bool dal_i2caux_dce110_construct(
 	struct i2caux_dce110 *i2caux_dce110,
 	struct adapter_service *as,
 	struct dc_context *ctx,
-	const struct dce110_aux_registers aux_regs[])
+	const struct dce110_aux_registers aux_regs[],
+	const struct dce110_i2c_hw_engine_registers i2c_hw_engine_regs[])
 {
 	uint32_t i = 0;
 	uint32_t reference_frequency = 0;
@@ -239,7 +240,7 @@ bool dal_i2caux_dce110_construct(
 		hw_arg_dce110.reference_frequency = reference_frequency;
 		hw_arg_dce110.default_speed = base->default_i2c_hw_speed;
 		hw_arg_dce110.ctx = ctx;
-		hw_arg_dce110.regs = &i2c_hw_engine_regs[i + 1];
+		hw_arg_dce110.regs = &i2c_hw_engine_regs[i];
 
 		base->i2c_hw_engines[line_id] =
 			dal_i2c_hw_engine_dce110_create(&hw_arg_dce110);
@@ -298,7 +299,12 @@ struct i2caux *dal_i2caux_dce110_create(
 		return NULL;
 	}
 
-	if (dal_i2caux_dce110_construct(i2caux_dce110, as, ctx, dce110_aux_regs))
+	if (dal_i2caux_dce110_construct(
+			i2caux_dce110,
+			as,
+			ctx,
+			dce110_aux_regs,
+			i2c_hw_engine_regs))
 		return &i2caux_dce110->base;
 
 	ASSERT_CRITICAL(false);
diff --git a/drivers/gpu/drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.h b/drivers/gpu/drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.h
index b4ca557de804..d26eec0ff12c 100644
--- a/drivers/gpu/drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.h
+++ b/drivers/gpu/drm/amd/dal/dc/i2caux/dce110/i2caux_dce110.h
@@ -35,6 +35,7 @@ struct i2caux_dce110 {
 };
 
 struct dce110_aux_registers;
+struct dce110_i2c_hw_engine_registers;
 
 struct i2caux *dal_i2caux_dce110_create(
 	struct adapter_service *as,
@@ -44,6 +45,7 @@ bool dal_i2caux_dce110_construct(
 	struct i2caux_dce110 *i2caux_dce110,
 	struct adapter_service *as,
 	struct dc_context *ctx,
-	const struct dce110_aux_registers *aux_regs);
+	const struct dce110_aux_registers *aux_regs,
+	const struct dce110_i2c_hw_engine_registers *i2c_hw_engine_regs);
 
 #endif /* __DAL_I2C_AUX_DCE110_H__ */
diff --git a/drivers/gpu/drm/amd/dal/dc/i2caux/dce112/i2caux_dce112.c b/drivers/gpu/drm/amd/dal/dc/i2caux/dce112/i2caux_dce112.c
index a3478f0a9cab..748f0c4c3968 100644
--- a/drivers/gpu/drm/amd/dal/dc/i2caux/dce112/i2caux_dce112.c
+++ b/drivers/gpu/drm/amd/dal/dc/i2caux/dce112/i2caux_dce112.c
@@ -39,15 +39,6 @@
 
 #include "../dce110/i2c_hw_engine_dce110.h"
 
-static const enum gpio_ddc_line hw_ddc_lines[] = {
-	GPIO_DDC_LINE_DDC1,
-	GPIO_DDC_LINE_DDC2,
-	GPIO_DDC_LINE_DDC3,
-	GPIO_DDC_LINE_DDC4,
-	GPIO_DDC_LINE_DDC5,
-	GPIO_DDC_LINE_DDC6,
-};
-
 #include "dce/dce_11_2_d.h"
 #include "dce/dce_11_2_sh_mask.h"
 
@@ -93,47 +84,16 @@ static bool construct(
 	struct adapter_service *as,
 	struct dc_context *ctx)
 {
-	int i = 0;
-	uint32_t reference_frequency = 0;
-	struct i2caux *base = NULL;
-
-	if (!dal_i2caux_dce110_construct(i2caux_dce110, as, ctx, dce112_aux_regs)) {
+	if (!dal_i2caux_dce110_construct(
+			i2caux_dce110,
+			as,
+			ctx,
+			dce112_aux_regs,
+			dce112_hw_engine_regs)) {
 		ASSERT_CRITICAL(false);
 		return false;
 	}
 
-	/*TODO: For CZ bring up, if dal_i2caux_get_reference_clock
-	 * does not return 48KHz, we need hard coded for 48Khz.
-	 * Some BIOS setting incorrect cause this
-	 * For production, we always get value from BIOS*/
-	reference_frequency =
-		dal_i2caux_get_reference_clock(as) >> 1;
-
-	base = &i2caux_dce110->base;
-
-	/* Create I2C engines (DDC lines per connector)
-	 * different I2C/AUX usage cases, DDC, Generic GPIO, AUX.
-	 */
-	do {
-		enum gpio_ddc_line line_id = hw_ddc_lines[i];
-
-		struct i2c_hw_engine_dce110_create_arg hw_arg_dce110;
-
-		hw_arg_dce110.engine_id = i;
-		hw_arg_dce110.reference_frequency = reference_frequency;
-		hw_arg_dce110.default_speed = base->default_i2c_hw_speed;
-		hw_arg_dce110.ctx = ctx;
-		hw_arg_dce110.regs = &dce112_hw_engine_regs[i];
-
-		if (base->i2c_hw_engines[line_id])
-			base->i2c_hw_engines[line_id]->funcs->destroy(&base->i2c_hw_engines[line_id]);
-
-		base->i2c_hw_engines[line_id] =
-			dal_i2c_hw_engine_dce110_create(&hw_arg_dce110);
-
-		++i;
-	} while (i < ARRAY_SIZE(hw_ddc_lines));
-
 	return true;
 }
 
-- 
2.10.1



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