As a next step, you could also remove HDP flushing on APUs.
Regards,
Felix
On 16-11-07 04:21 AM, Christian König wrote:
> From: Christian König <christian.koenig at amd.com>
>
> We don't need to use the PCI BAR on APUs. This allows us to access
> the full VRAM directly without being limited by the BAR size.
>
> Signed-off-by: Christian König <christian.koenig at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> index 3a25f72..70585b1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> @@ -375,9 +375,16 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev)
> /* size in MB on si */
> adev->mc.mc_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;
> adev->mc.real_vram_size = RREG32(mmCONFIG_MEMSIZE) * 1024ULL * 1024ULL;
> - adev->mc.visible_vram_size = adev->mc.aper_size;
> +
> +#ifdef CONFIG_X86_64
> + if (adev->flags & AMD_IS_APU) {
> + adev->mc.aper_base = RREG32(mmMC_VM_FB_OFFSET) << 22ULL;
> + adev->mc.aper_size = adev->mc.real_vram_size;
> + }
> +#endif
>
> /* In case the PCI BAR is larger than the actual amount of vram */
> + adev->mc.visible_vram_size = adev->mc.aper_size;
> if (adev->mc.visible_vram_size > adev->mc.real_vram_size)
> adev->mc.visible_vram_size = adev->mc.real_vram_size;
>
