Am 30.08.2016 um 10:54 schrieb Chunming Zhou: > Change-Id: I5dc3f9003e706d3a142aadb559bd85f6e0f2a03f > Signed-off-by: Chunming Zhou <David1.Zhou at amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 ++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++ > drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 9 +++++++++ > 3 files changed, 16 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > index b17916d..18bbfea 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h > @@ -2117,6 +2117,10 @@ struct amdgpu_device { > /* link all shadow bo */ > struct list_head shadow_list; > struct mutex shadow_list_lock; > + /* link all gtt */ > + struct mutex gtt_list_lock; I think this time a spin lock should clearly be sufficient here. Or do we block somewhere in the GART code path? Apart from that the patch looks good to me. Christian. > + struct list_head gtt_list; > + > }; > > bool amdgpu_device_is_px(struct drm_device *dev); > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > index 9a6a1a9..6cd485a 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > @@ -1591,6 +1591,9 @@ int amdgpu_device_init(struct amdgpu_device *adev, > INIT_LIST_HEAD(&adev->shadow_list); > mutex_init(&adev->shadow_list_lock); > > + INIT_LIST_HEAD(&adev->gtt_list); > + mutex_init(&adev->gtt_list_lock); > + > adev->rmmio_base = pci_resource_start(adev->pdev, 5); > adev->rmmio_size = pci_resource_len(adev->pdev, 5); > adev->rmmio = ioremap(adev->rmmio_base, adev->rmmio_size); > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > index 2ba3c8d..efeb9a5 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c > @@ -521,6 +521,7 @@ struct amdgpu_ttm_tt { > spinlock_t guptasklock; > struct list_head guptasks; > atomic_t mmu_invalidations; > + struct list_head list; > }; > > int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm, struct page **pages) > @@ -667,6 +668,9 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm, > ttm->num_pages, (unsigned)gtt->offset); > return r; > } > + mutex_lock(>t->adev->gtt_list_lock); > + list_add_tail(>t->list, >t->adev->gtt_list); > + mutex_unlock(>t->adev->gtt_list_lock); > return 0; > } > > @@ -681,6 +685,10 @@ static int amdgpu_ttm_backend_unbind(struct ttm_tt *ttm) > if (gtt->userptr) > amdgpu_ttm_tt_unpin_userptr(ttm); > > + mutex_lock(>t->adev->gtt_list_lock); > + list_del_init(>t->list); > + mutex_unlock(>t->adev->gtt_list_lock); > + > return 0; > } > > @@ -717,6 +725,7 @@ static struct ttm_tt *amdgpu_ttm_tt_create(struct ttm_bo_device *bdev, > kfree(gtt); > return NULL; > } > + INIT_LIST_HEAD(>t->list); > return >t->ttm.ttm; > } >