> -----Original Message----- > From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf > Of Tom St Denis > Sent: Monday, August 29, 2016 9:06 AM > To: amd-gfx at lists.freedesktop.org > Cc: StDenis, Tom > Subject: [PATCH] drm/amd/amdgpu: debugfs SMC addresses are byte > addresses > > Signed-off-by: Tom St Denis <tom.stdenis at amd.com> Reviewed-by: Alex Deucher <alexander.deucher at amd.com> FWIW, all of the indirect register apertures use byte aligned indicies. Alex > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > index 1b31a7c1d217..288cfb4fa2ba 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > @@ -2678,7 +2678,7 @@ static ssize_t > amdgpu_debugfs_regs_smc_read(struct file *f, char __user *buf, > while (size) { > uint32_t value; > > - value = RREG32_SMC(*pos >> 2); > + value = RREG32_SMC(*pos); > r = put_user(value, (uint32_t *)buf); > if (r) > return r; > @@ -2709,7 +2709,7 @@ static ssize_t > amdgpu_debugfs_regs_smc_write(struct file *f, const char __user * > if (r) > return r; > > - WREG32_SMC(*pos >> 2, value); > + WREG32_SMC(*pos, value); > > result += 4; > buf += 4; > -- > 2.9.3 > > _______________________________________________ > amd-gfx mailing list > amd-gfx at lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
